1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 /* 3 * Copyright (C) 2018 Amarula Solutions. 4 * Author: Jagan Teki <jagan@amarulasolutions.com> 5 */ 6 7 #include <common.h> 8 #include <clk-uclass.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <asm/arch/ccu.h> 12 #include <dt-bindings/clock/sun50i-h6-ccu.h> 13 #include <dt-bindings/reset/sun50i-h6-ccu.h> 14 15 static struct ccu_clk_gate h6_gates[] = { 16 [CLK_BUS_MMC0] = GATE(0x84c, BIT(0)), 17 [CLK_BUS_MMC1] = GATE(0x84c, BIT(1)), 18 [CLK_BUS_MMC2] = GATE(0x84c, BIT(2)), 19 [CLK_BUS_UART0] = GATE(0x90c, BIT(0)), 20 [CLK_BUS_UART1] = GATE(0x90c, BIT(1)), 21 [CLK_BUS_UART2] = GATE(0x90c, BIT(2)), 22 [CLK_BUS_UART3] = GATE(0x90c, BIT(3)), 23 24 [CLK_SPI0] = GATE(0x940, BIT(31)), 25 [CLK_SPI1] = GATE(0x944, BIT(31)), 26 27 [CLK_BUS_SPI0] = GATE(0x96c, BIT(0)), 28 [CLK_BUS_SPI1] = GATE(0x96c, BIT(1)), 29 30 [CLK_BUS_EMAC] = GATE(0x97c, BIT(0)), 31 }; 32 33 static struct ccu_reset h6_resets[] = { 34 [RST_BUS_MMC0] = RESET(0x84c, BIT(16)), 35 [RST_BUS_MMC1] = RESET(0x84c, BIT(17)), 36 [RST_BUS_MMC2] = RESET(0x84c, BIT(18)), 37 [RST_BUS_UART0] = RESET(0x90c, BIT(16)), 38 [RST_BUS_UART1] = RESET(0x90c, BIT(17)), 39 [RST_BUS_UART2] = RESET(0x90c, BIT(18)), 40 [RST_BUS_UART3] = RESET(0x90c, BIT(19)), 41 42 [RST_BUS_SPI0] = RESET(0x96c, BIT(16)), 43 [RST_BUS_SPI1] = RESET(0x96c, BIT(17)), 44 45 [RST_BUS_EMAC] = RESET(0x97c, BIT(16)), 46 }; 47 48 static const struct ccu_desc h6_ccu_desc = { 49 .gates = h6_gates, 50 .resets = h6_resets, 51 }; 52 53 static int h6_clk_bind(struct udevice *dev) 54 { 55 return sunxi_reset_bind(dev, ARRAY_SIZE(h6_resets)); 56 } 57 58 static const struct udevice_id h6_ccu_ids[] = { 59 { .compatible = "allwinner,sun50i-h6-ccu", 60 .data = (ulong)&h6_ccu_desc }, 61 { } 62 }; 63 64 U_BOOT_DRIVER(clk_sun50i_h6) = { 65 .name = "sun50i_h6_ccu", 66 .id = UCLASS_CLK, 67 .of_match = h6_ccu_ids, 68 .priv_auto_alloc_size = sizeof(struct ccu_priv), 69 .ops = &sunxi_clk_ops, 70 .probe = sunxi_clk_probe, 71 .bind = h6_clk_bind, 72 }; 73