1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 Amarula Solutions. 4 * Author: Jagan Teki <jagan@amarulasolutions.com> 5 */ 6 7 #include <common.h> 8 #include <clk-uclass.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <asm/arch/ccu.h> 12 #include <dt-bindings/clock/sun50i-a64-ccu.h> 13 #include <dt-bindings/reset/sun50i-a64-ccu.h> 14 15 static const struct ccu_clk_gate a64_gates[] = { 16 [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), 17 [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), 18 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), 19 [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), 20 [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), 21 [CLK_BUS_OTG] = GATE(0x060, BIT(23)), 22 [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)), 23 [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)), 24 [CLK_BUS_OHCI0] = GATE(0x060, BIT(28)), 25 [CLK_BUS_OHCI1] = GATE(0x060, BIT(29)), 26 27 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)), 28 [CLK_BUS_UART1] = GATE(0x06c, BIT(17)), 29 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)), 30 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), 31 [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), 32 33 [CLK_SPI0] = GATE(0x0a0, BIT(31)), 34 [CLK_SPI1] = GATE(0x0a4, BIT(31)), 35 36 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), 37 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), 38 [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)), 39 [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)), 40 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), 41 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), 42 }; 43 44 static const struct ccu_reset a64_resets[] = { 45 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 46 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), 47 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), 48 49 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), 50 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), 51 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), 52 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), 53 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), 54 [RST_BUS_OTG] = RESET(0x2c0, BIT(23)), 55 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)), 56 [RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)), 57 [RST_BUS_OHCI0] = RESET(0x2c0, BIT(28)), 58 [RST_BUS_OHCI1] = RESET(0x2c0, BIT(29)), 59 60 [RST_BUS_UART0] = RESET(0x2d8, BIT(16)), 61 [RST_BUS_UART1] = RESET(0x2d8, BIT(17)), 62 [RST_BUS_UART2] = RESET(0x2d8, BIT(18)), 63 [RST_BUS_UART3] = RESET(0x2d8, BIT(19)), 64 [RST_BUS_UART4] = RESET(0x2d8, BIT(20)), 65 }; 66 67 static const struct ccu_desc a64_ccu_desc = { 68 .gates = a64_gates, 69 .resets = a64_resets, 70 }; 71 72 static int a64_clk_bind(struct udevice *dev) 73 { 74 return sunxi_reset_bind(dev, ARRAY_SIZE(a64_resets)); 75 } 76 77 static const struct udevice_id a64_ccu_ids[] = { 78 { .compatible = "allwinner,sun50i-a64-ccu", 79 .data = (ulong)&a64_ccu_desc }, 80 { } 81 }; 82 83 U_BOOT_DRIVER(clk_sun50i_a64) = { 84 .name = "sun50i_a64_ccu", 85 .id = UCLASS_CLK, 86 .of_match = a64_ccu_ids, 87 .priv_auto_alloc_size = sizeof(struct ccu_priv), 88 .ops = &sunxi_clk_ops, 89 .probe = sunxi_clk_probe, 90 .bind = a64_clk_bind, 91 }; 92