xref: /openbmc/u-boot/drivers/clk/sunxi/clk_a64.c (revision 6744c0d6)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2018 Amarula Solutions.
4  * Author: Jagan Teki <jagan@amarulasolutions.com>
5  */
6 
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun50i-a64-ccu.h>
13 #include <dt-bindings/reset/sun50i-a64-ccu.h>
14 
15 static const struct ccu_clk_gate a64_gates[] = {
16 	[CLK_BUS_MMC0]		= GATE(0x060, BIT(8)),
17 	[CLK_BUS_MMC1]		= GATE(0x060, BIT(9)),
18 	[CLK_BUS_MMC2]		= GATE(0x060, BIT(10)),
19 	[CLK_BUS_OTG]		= GATE(0x060, BIT(23)),
20 	[CLK_BUS_EHCI0]		= GATE(0x060, BIT(24)),
21 	[CLK_BUS_EHCI1]		= GATE(0x060, BIT(25)),
22 	[CLK_BUS_OHCI0]		= GATE(0x060, BIT(28)),
23 	[CLK_BUS_OHCI1]		= GATE(0x060, BIT(29)),
24 
25 	[CLK_BUS_UART0]		= GATE(0x06c, BIT(16)),
26 	[CLK_BUS_UART1]		= GATE(0x06c, BIT(17)),
27 	[CLK_BUS_UART2]		= GATE(0x06c, BIT(18)),
28 	[CLK_BUS_UART3]		= GATE(0x06c, BIT(19)),
29 	[CLK_BUS_UART4]		= GATE(0x06c, BIT(20)),
30 
31 	[CLK_USB_PHY0]		= GATE(0x0cc, BIT(8)),
32 	[CLK_USB_PHY1]		= GATE(0x0cc, BIT(9)),
33 	[CLK_USB_HSIC]		= GATE(0x0cc, BIT(10)),
34 	[CLK_USB_HSIC_12M]	= GATE(0x0cc, BIT(11)),
35 	[CLK_USB_OHCI0]		= GATE(0x0cc, BIT(16)),
36 	[CLK_USB_OHCI1]		= GATE(0x0cc, BIT(17)),
37 };
38 
39 static const struct ccu_reset a64_resets[] = {
40 	[RST_USB_PHY0]          = RESET(0x0cc, BIT(0)),
41 	[RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
42 	[RST_USB_HSIC]          = RESET(0x0cc, BIT(2)),
43 
44 	[RST_BUS_MMC0]		= RESET(0x2c0, BIT(8)),
45 	[RST_BUS_MMC1]		= RESET(0x2c0, BIT(9)),
46 	[RST_BUS_MMC2]		= RESET(0x2c0, BIT(10)),
47 	[RST_BUS_OTG]           = RESET(0x2c0, BIT(23)),
48 	[RST_BUS_EHCI0]         = RESET(0x2c0, BIT(24)),
49 	[RST_BUS_EHCI1]         = RESET(0x2c0, BIT(25)),
50 	[RST_BUS_OHCI0]         = RESET(0x2c0, BIT(28)),
51 	[RST_BUS_OHCI1]         = RESET(0x2c0, BIT(29)),
52 
53 	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
54 	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
55 	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
56 	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
57 	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
58 };
59 
60 static const struct ccu_desc a64_ccu_desc = {
61 	.gates = a64_gates,
62 	.resets = a64_resets,
63 };
64 
65 static int a64_clk_bind(struct udevice *dev)
66 {
67 	return sunxi_reset_bind(dev, ARRAY_SIZE(a64_resets));
68 }
69 
70 static const struct udevice_id a64_ccu_ids[] = {
71 	{ .compatible = "allwinner,sun50i-a64-ccu",
72 	  .data = (ulong)&a64_ccu_desc },
73 	{ }
74 };
75 
76 U_BOOT_DRIVER(clk_sun50i_a64) = {
77 	.name		= "sun50i_a64_ccu",
78 	.id		= UCLASS_CLK,
79 	.of_match	= a64_ccu_ids,
80 	.priv_auto_alloc_size	= sizeof(struct ccu_priv),
81 	.ops		= &sunxi_clk_ops,
82 	.probe		= sunxi_clk_probe,
83 	.bind		= a64_clk_bind,
84 };
85