1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 Amarula Solutions. 4 * Author: Jagan Teki <jagan@amarulasolutions.com> 5 */ 6 7 #include <common.h> 8 #include <clk-uclass.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <asm/arch/ccu.h> 12 #include <dt-bindings/clock/sun50i-a64-ccu.h> 13 #include <dt-bindings/reset/sun50i-a64-ccu.h> 14 15 static const struct ccu_clk_gate a64_gates[] = { 16 [CLK_BUS_OTG] = GATE(0x060, BIT(23)), 17 [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)), 18 [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)), 19 [CLK_BUS_OHCI0] = GATE(0x060, BIT(28)), 20 [CLK_BUS_OHCI1] = GATE(0x060, BIT(29)), 21 22 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)), 23 [CLK_BUS_UART1] = GATE(0x06c, BIT(17)), 24 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)), 25 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), 26 [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), 27 28 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), 29 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), 30 [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)), 31 [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)), 32 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), 33 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), 34 }; 35 36 static const struct ccu_reset a64_resets[] = { 37 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 38 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), 39 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), 40 41 [RST_BUS_OTG] = RESET(0x2c0, BIT(23)), 42 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)), 43 [RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)), 44 [RST_BUS_OHCI0] = RESET(0x2c0, BIT(28)), 45 [RST_BUS_OHCI1] = RESET(0x2c0, BIT(29)), 46 }; 47 48 static const struct ccu_desc a64_ccu_desc = { 49 .gates = a64_gates, 50 .resets = a64_resets, 51 }; 52 53 static int a64_clk_bind(struct udevice *dev) 54 { 55 return sunxi_reset_bind(dev, ARRAY_SIZE(a64_resets)); 56 } 57 58 static const struct udevice_id a64_ccu_ids[] = { 59 { .compatible = "allwinner,sun50i-a64-ccu", 60 .data = (ulong)&a64_ccu_desc }, 61 { } 62 }; 63 64 U_BOOT_DRIVER(clk_sun50i_a64) = { 65 .name = "sun50i_a64_ccu", 66 .id = UCLASS_CLK, 67 .of_match = a64_ccu_ids, 68 .priv_auto_alloc_size = sizeof(struct ccu_priv), 69 .ops = &sunxi_clk_ops, 70 .probe = sunxi_clk_probe, 71 .bind = a64_clk_bind, 72 }; 73