1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2018 Amarula Solutions. 4 * Author: Jagan Teki <jagan@amarulasolutions.com> 5 */ 6 7 #include <common.h> 8 #include <clk-uclass.h> 9 #include <dm.h> 10 #include <errno.h> 11 #include <asm/arch/ccu.h> 12 #include <dt-bindings/clock/sun50i-a64-ccu.h> 13 #include <dt-bindings/reset/sun50i-a64-ccu.h> 14 15 static const struct ccu_clk_gate a64_gates[] = { 16 [CLK_BUS_MMC0] = GATE(0x060, BIT(8)), 17 [CLK_BUS_MMC1] = GATE(0x060, BIT(9)), 18 [CLK_BUS_MMC2] = GATE(0x060, BIT(10)), 19 [CLK_BUS_EMAC] = GATE(0x060, BIT(17)), 20 [CLK_BUS_SPI0] = GATE(0x060, BIT(20)), 21 [CLK_BUS_SPI1] = GATE(0x060, BIT(21)), 22 [CLK_BUS_OTG] = GATE(0x060, BIT(23)), 23 [CLK_BUS_EHCI0] = GATE(0x060, BIT(24)), 24 [CLK_BUS_EHCI1] = GATE(0x060, BIT(25)), 25 [CLK_BUS_OHCI0] = GATE(0x060, BIT(28)), 26 [CLK_BUS_OHCI1] = GATE(0x060, BIT(29)), 27 28 [CLK_BUS_UART0] = GATE(0x06c, BIT(16)), 29 [CLK_BUS_UART1] = GATE(0x06c, BIT(17)), 30 [CLK_BUS_UART2] = GATE(0x06c, BIT(18)), 31 [CLK_BUS_UART3] = GATE(0x06c, BIT(19)), 32 [CLK_BUS_UART4] = GATE(0x06c, BIT(20)), 33 34 [CLK_SPI0] = GATE(0x0a0, BIT(31)), 35 [CLK_SPI1] = GATE(0x0a4, BIT(31)), 36 37 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)), 38 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)), 39 [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)), 40 [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)), 41 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)), 42 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(17)), 43 }; 44 45 static const struct ccu_reset a64_resets[] = { 46 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)), 47 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)), 48 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)), 49 50 [RST_BUS_MMC0] = RESET(0x2c0, BIT(8)), 51 [RST_BUS_MMC1] = RESET(0x2c0, BIT(9)), 52 [RST_BUS_MMC2] = RESET(0x2c0, BIT(10)), 53 [RST_BUS_EMAC] = RESET(0x2c0, BIT(17)), 54 [RST_BUS_SPI0] = RESET(0x2c0, BIT(20)), 55 [RST_BUS_SPI1] = RESET(0x2c0, BIT(21)), 56 [RST_BUS_OTG] = RESET(0x2c0, BIT(23)), 57 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(24)), 58 [RST_BUS_EHCI1] = RESET(0x2c0, BIT(25)), 59 [RST_BUS_OHCI0] = RESET(0x2c0, BIT(28)), 60 [RST_BUS_OHCI1] = RESET(0x2c0, BIT(29)), 61 62 [RST_BUS_UART0] = RESET(0x2d8, BIT(16)), 63 [RST_BUS_UART1] = RESET(0x2d8, BIT(17)), 64 [RST_BUS_UART2] = RESET(0x2d8, BIT(18)), 65 [RST_BUS_UART3] = RESET(0x2d8, BIT(19)), 66 [RST_BUS_UART4] = RESET(0x2d8, BIT(20)), 67 }; 68 69 static const struct ccu_desc a64_ccu_desc = { 70 .gates = a64_gates, 71 .resets = a64_resets, 72 }; 73 74 static int a64_clk_bind(struct udevice *dev) 75 { 76 return sunxi_reset_bind(dev, ARRAY_SIZE(a64_resets)); 77 } 78 79 static const struct udevice_id a64_ccu_ids[] = { 80 { .compatible = "allwinner,sun50i-a64-ccu", 81 .data = (ulong)&a64_ccu_desc }, 82 { } 83 }; 84 85 U_BOOT_DRIVER(clk_sun50i_a64) = { 86 .name = "sun50i_a64_ccu", 87 .id = UCLASS_CLK, 88 .of_match = a64_ccu_ids, 89 .priv_auto_alloc_size = sizeof(struct ccu_priv), 90 .ops = &sunxi_clk_ops, 91 .probe = sunxi_clk_probe, 92 .bind = a64_clk_bind, 93 }; 94