xref: /openbmc/u-boot/drivers/clk/sunxi/clk_a64.c (revision 8606f960)
10d47bc70SJagan Teki // SPDX-License-Identifier: GPL-2.0+
20d47bc70SJagan Teki /*
30d47bc70SJagan Teki  * Copyright (C) 2018 Amarula Solutions.
40d47bc70SJagan Teki  * Author: Jagan Teki <jagan@amarulasolutions.com>
50d47bc70SJagan Teki  */
60d47bc70SJagan Teki 
70d47bc70SJagan Teki #include <common.h>
80d47bc70SJagan Teki #include <clk-uclass.h>
90d47bc70SJagan Teki #include <dm.h>
100d47bc70SJagan Teki #include <errno.h>
110d47bc70SJagan Teki #include <asm/arch/ccu.h>
120d47bc70SJagan Teki #include <dt-bindings/clock/sun50i-a64-ccu.h>
1399ba4308SJagan Teki #include <dt-bindings/reset/sun50i-a64-ccu.h>
140d47bc70SJagan Teki 
150d47bc70SJagan Teki static const struct ccu_clk_gate a64_gates[] = {
160d47bc70SJagan Teki 	[CLK_BUS_OTG]		= GATE(0x060, BIT(23)),
170d47bc70SJagan Teki 	[CLK_BUS_EHCI0]		= GATE(0x060, BIT(24)),
180d47bc70SJagan Teki 	[CLK_BUS_EHCI1]		= GATE(0x060, BIT(25)),
190d47bc70SJagan Teki 	[CLK_BUS_OHCI0]		= GATE(0x060, BIT(28)),
200d47bc70SJagan Teki 	[CLK_BUS_OHCI1]		= GATE(0x060, BIT(29)),
210d47bc70SJagan Teki 
224acc7119SJagan Teki 	[CLK_BUS_UART0]		= GATE(0x06c, BIT(16)),
234acc7119SJagan Teki 	[CLK_BUS_UART1]		= GATE(0x06c, BIT(17)),
244acc7119SJagan Teki 	[CLK_BUS_UART2]		= GATE(0x06c, BIT(18)),
254acc7119SJagan Teki 	[CLK_BUS_UART3]		= GATE(0x06c, BIT(19)),
264acc7119SJagan Teki 	[CLK_BUS_UART4]		= GATE(0x06c, BIT(20)),
274acc7119SJagan Teki 
280d47bc70SJagan Teki 	[CLK_USB_PHY0]		= GATE(0x0cc, BIT(8)),
290d47bc70SJagan Teki 	[CLK_USB_PHY1]		= GATE(0x0cc, BIT(9)),
300d47bc70SJagan Teki 	[CLK_USB_HSIC]		= GATE(0x0cc, BIT(10)),
310d47bc70SJagan Teki 	[CLK_USB_HSIC_12M]	= GATE(0x0cc, BIT(11)),
320d47bc70SJagan Teki 	[CLK_USB_OHCI0]		= GATE(0x0cc, BIT(16)),
330d47bc70SJagan Teki 	[CLK_USB_OHCI1]		= GATE(0x0cc, BIT(17)),
340d47bc70SJagan Teki };
350d47bc70SJagan Teki 
3699ba4308SJagan Teki static const struct ccu_reset a64_resets[] = {
3799ba4308SJagan Teki 	[RST_USB_PHY0]          = RESET(0x0cc, BIT(0)),
3899ba4308SJagan Teki 	[RST_USB_PHY1]          = RESET(0x0cc, BIT(1)),
3999ba4308SJagan Teki 	[RST_USB_HSIC]          = RESET(0x0cc, BIT(2)),
4099ba4308SJagan Teki 
4199ba4308SJagan Teki 	[RST_BUS_OTG]           = RESET(0x2c0, BIT(23)),
4299ba4308SJagan Teki 	[RST_BUS_EHCI0]         = RESET(0x2c0, BIT(24)),
4399ba4308SJagan Teki 	[RST_BUS_EHCI1]         = RESET(0x2c0, BIT(25)),
4499ba4308SJagan Teki 	[RST_BUS_OHCI0]         = RESET(0x2c0, BIT(28)),
4599ba4308SJagan Teki 	[RST_BUS_OHCI1]         = RESET(0x2c0, BIT(29)),
46*8606f960SJagan Teki 
47*8606f960SJagan Teki 	[RST_BUS_UART0]		= RESET(0x2d8, BIT(16)),
48*8606f960SJagan Teki 	[RST_BUS_UART1]		= RESET(0x2d8, BIT(17)),
49*8606f960SJagan Teki 	[RST_BUS_UART2]		= RESET(0x2d8, BIT(18)),
50*8606f960SJagan Teki 	[RST_BUS_UART3]		= RESET(0x2d8, BIT(19)),
51*8606f960SJagan Teki 	[RST_BUS_UART4]		= RESET(0x2d8, BIT(20)),
5299ba4308SJagan Teki };
5399ba4308SJagan Teki 
540d47bc70SJagan Teki static const struct ccu_desc a64_ccu_desc = {
550d47bc70SJagan Teki 	.gates = a64_gates,
5699ba4308SJagan Teki 	.resets = a64_resets,
570d47bc70SJagan Teki };
580d47bc70SJagan Teki 
5999ba4308SJagan Teki static int a64_clk_bind(struct udevice *dev)
6099ba4308SJagan Teki {
6199ba4308SJagan Teki 	return sunxi_reset_bind(dev, ARRAY_SIZE(a64_resets));
6299ba4308SJagan Teki }
6399ba4308SJagan Teki 
640d47bc70SJagan Teki static const struct udevice_id a64_ccu_ids[] = {
650d47bc70SJagan Teki 	{ .compatible = "allwinner,sun50i-a64-ccu",
660d47bc70SJagan Teki 	  .data = (ulong)&a64_ccu_desc },
670d47bc70SJagan Teki 	{ }
680d47bc70SJagan Teki };
690d47bc70SJagan Teki 
700d47bc70SJagan Teki U_BOOT_DRIVER(clk_sun50i_a64) = {
710d47bc70SJagan Teki 	.name		= "sun50i_a64_ccu",
720d47bc70SJagan Teki 	.id		= UCLASS_CLK,
730d47bc70SJagan Teki 	.of_match	= a64_ccu_ids,
740d47bc70SJagan Teki 	.priv_auto_alloc_size	= sizeof(struct ccu_priv),
750d47bc70SJagan Teki 	.ops		= &sunxi_clk_ops,
760d47bc70SJagan Teki 	.probe		= sunxi_clk_probe,
7799ba4308SJagan Teki 	.bind		= a64_clk_bind,
780d47bc70SJagan Teki };
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