xref: /openbmc/u-boot/drivers/clk/sunxi/clk_a31.c (revision 8eef803a)
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (C) 2018 Amarula Solutions B.V.
4  * Author: Jagan Teki <jagan@amarulasolutions.com>
5  */
6 
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun6i-a31-ccu.h>
13 #include <dt-bindings/reset/sun6i-a31-ccu.h>
14 
15 static struct ccu_clk_gate a31_gates[] = {
16 	[CLK_AHB1_OTG]		= GATE(0x060, BIT(24)),
17 	[CLK_AHB1_EHCI0]	= GATE(0x060, BIT(26)),
18 	[CLK_AHB1_EHCI1]	= GATE(0x060, BIT(27)),
19 	[CLK_AHB1_OHCI0]	= GATE(0x060, BIT(29)),
20 	[CLK_AHB1_OHCI1]	= GATE(0x060, BIT(30)),
21 	[CLK_AHB1_OHCI2]	= GATE(0x060, BIT(31)),
22 
23 	[CLK_APB2_UART0]	= GATE(0x06c, BIT(16)),
24 	[CLK_APB2_UART1]	= GATE(0x06c, BIT(17)),
25 	[CLK_APB2_UART2]	= GATE(0x06c, BIT(18)),
26 	[CLK_APB2_UART3]	= GATE(0x06c, BIT(19)),
27 	[CLK_APB2_UART4]	= GATE(0x06c, BIT(20)),
28 	[CLK_APB2_UART5]	= GATE(0x06c, BIT(21)),
29 
30 	[CLK_USB_PHY0]		= GATE(0x0cc, BIT(8)),
31 	[CLK_USB_PHY1]		= GATE(0x0cc, BIT(9)),
32 	[CLK_USB_PHY2]		= GATE(0x0cc, BIT(10)),
33 	[CLK_USB_OHCI0]		= GATE(0x0cc, BIT(16)),
34 	[CLK_USB_OHCI1]		= GATE(0x0cc, BIT(17)),
35 	[CLK_USB_OHCI2]		= GATE(0x0cc, BIT(18)),
36 };
37 
38 static struct ccu_reset a31_resets[] = {
39 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
40 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
41 	[RST_USB_PHY2]		= RESET(0x0cc, BIT(2)),
42 
43 	[RST_AHB1_OTG]		= RESET(0x2c0, BIT(24)),
44 	[RST_AHB1_EHCI0]	= RESET(0x2c0, BIT(26)),
45 	[RST_AHB1_EHCI1]	= RESET(0x2c0, BIT(27)),
46 	[RST_AHB1_OHCI0]	= RESET(0x2c0, BIT(29)),
47 	[RST_AHB1_OHCI1]	= RESET(0x2c0, BIT(30)),
48 	[RST_AHB1_OHCI2]	= RESET(0x2c0, BIT(31)),
49 
50 	[RST_APB2_UART0]	= RESET(0x2d8, BIT(16)),
51 	[RST_APB2_UART1]	= RESET(0x2d8, BIT(17)),
52 	[RST_APB2_UART2]	= RESET(0x2d8, BIT(18)),
53 	[RST_APB2_UART3]	= RESET(0x2d8, BIT(19)),
54 	[RST_APB2_UART4]	= RESET(0x2d8, BIT(20)),
55 	[RST_APB2_UART5]	= RESET(0x2d8, BIT(21)),
56 };
57 
58 static const struct ccu_desc a31_ccu_desc = {
59 	.gates = a31_gates,
60 	.resets = a31_resets,
61 };
62 
63 static int a31_clk_bind(struct udevice *dev)
64 {
65 	return sunxi_reset_bind(dev, ARRAY_SIZE(a31_resets));
66 }
67 
68 static const struct udevice_id a31_clk_ids[] = {
69 	{ .compatible = "allwinner,sun6i-a31-ccu",
70 	  .data = (ulong)&a31_ccu_desc },
71 	{ }
72 };
73 
74 U_BOOT_DRIVER(clk_sun6i_a31) = {
75 	.name		= "sun6i_a31_ccu",
76 	.id		= UCLASS_CLK,
77 	.of_match	= a31_clk_ids,
78 	.priv_auto_alloc_size	= sizeof(struct ccu_priv),
79 	.ops		= &sunxi_clk_ops,
80 	.probe		= sunxi_clk_probe,
81 	.bind		= a31_clk_bind,
82 };
83