1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 */
6
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun5i-ccu.h>
13 #include <dt-bindings/reset/sun5i-ccu.h>
14
15 static struct ccu_clk_gate a10s_gates[] = {
16 [CLK_AHB_OTG] = GATE(0x060, BIT(0)),
17 [CLK_AHB_EHCI] = GATE(0x060, BIT(1)),
18 [CLK_AHB_OHCI] = GATE(0x060, BIT(2)),
19 [CLK_AHB_MMC0] = GATE(0x060, BIT(8)),
20 [CLK_AHB_MMC1] = GATE(0x060, BIT(9)),
21 [CLK_AHB_MMC2] = GATE(0x060, BIT(10)),
22 [CLK_AHB_EMAC] = GATE(0x060, BIT(17)),
23 [CLK_AHB_SPI0] = GATE(0x060, BIT(20)),
24 [CLK_AHB_SPI1] = GATE(0x060, BIT(21)),
25 [CLK_AHB_SPI2] = GATE(0x060, BIT(22)),
26
27 [CLK_APB1_UART0] = GATE(0x06c, BIT(16)),
28 [CLK_APB1_UART1] = GATE(0x06c, BIT(17)),
29 [CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
30 [CLK_APB1_UART3] = GATE(0x06c, BIT(19)),
31
32 [CLK_SPI0] = GATE(0x0a0, BIT(31)),
33 [CLK_SPI1] = GATE(0x0a4, BIT(31)),
34 [CLK_SPI2] = GATE(0x0a8, BIT(31)),
35
36 [CLK_USB_OHCI] = GATE(0x0cc, BIT(6)),
37 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
38 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)),
39 };
40
41 static struct ccu_reset a10s_resets[] = {
42 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
43 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
44 };
45
46 static const struct ccu_desc a10s_ccu_desc = {
47 .gates = a10s_gates,
48 .resets = a10s_resets,
49 };
50
a10s_clk_bind(struct udevice * dev)51 static int a10s_clk_bind(struct udevice *dev)
52 {
53 return sunxi_reset_bind(dev, ARRAY_SIZE(a10s_resets));
54 }
55
56 static const struct udevice_id a10s_ccu_ids[] = {
57 { .compatible = "allwinner,sun5i-a10s-ccu",
58 .data = (ulong)&a10s_ccu_desc },
59 { .compatible = "allwinner,sun5i-a13-ccu",
60 .data = (ulong)&a10s_ccu_desc },
61 { }
62 };
63
64 U_BOOT_DRIVER(clk_sun5i_a10s) = {
65 .name = "sun5i_a10s_ccu",
66 .id = UCLASS_CLK,
67 .of_match = a10s_ccu_ids,
68 .priv_auto_alloc_size = sizeof(struct ccu_priv),
69 .ops = &sunxi_clk_ops,
70 .probe = sunxi_clk_probe,
71 .bind = a10s_clk_bind,
72 };
73