xref: /openbmc/u-boot/drivers/clk/sunxi/clk_a10s.c (revision 821aa191)
1c8e743c1SJagan Teki // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2c8e743c1SJagan Teki /*
3c8e743c1SJagan Teki  * Copyright (C) 2018 Amarula Solutions.
4c8e743c1SJagan Teki  * Author: Jagan Teki <jagan@amarulasolutions.com>
5c8e743c1SJagan Teki  */
6c8e743c1SJagan Teki 
7c8e743c1SJagan Teki #include <common.h>
8c8e743c1SJagan Teki #include <clk-uclass.h>
9c8e743c1SJagan Teki #include <dm.h>
10c8e743c1SJagan Teki #include <errno.h>
11c8e743c1SJagan Teki #include <asm/arch/ccu.h>
12c8e743c1SJagan Teki #include <dt-bindings/clock/sun5i-ccu.h>
13c8e743c1SJagan Teki #include <dt-bindings/reset/sun5i-ccu.h>
14c8e743c1SJagan Teki 
15c8e743c1SJagan Teki static struct ccu_clk_gate a10s_gates[] = {
16c8e743c1SJagan Teki 	[CLK_AHB_OTG]		= GATE(0x060, BIT(0)),
17c8e743c1SJagan Teki 	[CLK_AHB_EHCI]		= GATE(0x060, BIT(1)),
18c8e743c1SJagan Teki 	[CLK_AHB_OHCI]		= GATE(0x060, BIT(2)),
19bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC0]		= GATE(0x060, BIT(8)),
20bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC1]		= GATE(0x060, BIT(9)),
21bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC2]		= GATE(0x060, BIT(10)),
22*3d83c4a1SJagan Teki 	[CLK_AHB_EMAC]		= GATE(0x060, BIT(17)),
2382111469SJagan Teki 	[CLK_AHB_SPI0]		= GATE(0x060, BIT(20)),
2482111469SJagan Teki 	[CLK_AHB_SPI1]		= GATE(0x060, BIT(21)),
2582111469SJagan Teki 	[CLK_AHB_SPI2]		= GATE(0x060, BIT(22)),
26c8e743c1SJagan Teki 
274acc7119SJagan Teki 	[CLK_APB1_UART0]	= GATE(0x06c, BIT(16)),
284acc7119SJagan Teki 	[CLK_APB1_UART1]	= GATE(0x06c, BIT(17)),
294acc7119SJagan Teki 	[CLK_APB1_UART2]	= GATE(0x06c, BIT(18)),
304acc7119SJagan Teki 	[CLK_APB1_UART3]	= GATE(0x06c, BIT(19)),
314acc7119SJagan Teki 
3282111469SJagan Teki 	[CLK_SPI0]		= GATE(0x0a0, BIT(31)),
3382111469SJagan Teki 	[CLK_SPI1]		= GATE(0x0a4, BIT(31)),
3482111469SJagan Teki 	[CLK_SPI2]		= GATE(0x0a8, BIT(31)),
3582111469SJagan Teki 
36c8e743c1SJagan Teki 	[CLK_USB_OHCI]		= GATE(0x0cc, BIT(6)),
37c8e743c1SJagan Teki 	[CLK_USB_PHY0]		= GATE(0x0cc, BIT(8)),
38c8e743c1SJagan Teki 	[CLK_USB_PHY1]		= GATE(0x0cc, BIT(9)),
39c8e743c1SJagan Teki };
40c8e743c1SJagan Teki 
41c8e743c1SJagan Teki static struct ccu_reset a10s_resets[] = {
42c8e743c1SJagan Teki 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
43c8e743c1SJagan Teki 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
44c8e743c1SJagan Teki };
45c8e743c1SJagan Teki 
46c8e743c1SJagan Teki static const struct ccu_desc a10s_ccu_desc = {
47c8e743c1SJagan Teki 	.gates = a10s_gates,
48c8e743c1SJagan Teki 	.resets = a10s_resets,
49c8e743c1SJagan Teki };
50c8e743c1SJagan Teki 
a10s_clk_bind(struct udevice * dev)51c8e743c1SJagan Teki static int a10s_clk_bind(struct udevice *dev)
52c8e743c1SJagan Teki {
53c8e743c1SJagan Teki 	return sunxi_reset_bind(dev, ARRAY_SIZE(a10s_resets));
54c8e743c1SJagan Teki }
55c8e743c1SJagan Teki 
56c8e743c1SJagan Teki static const struct udevice_id a10s_ccu_ids[] = {
57c8e743c1SJagan Teki 	{ .compatible = "allwinner,sun5i-a10s-ccu",
58c8e743c1SJagan Teki 	  .data = (ulong)&a10s_ccu_desc },
59c8e743c1SJagan Teki 	{ .compatible = "allwinner,sun5i-a13-ccu",
60c8e743c1SJagan Teki 	  .data = (ulong)&a10s_ccu_desc },
61c8e743c1SJagan Teki 	{ }
62c8e743c1SJagan Teki };
63c8e743c1SJagan Teki 
64c8e743c1SJagan Teki U_BOOT_DRIVER(clk_sun5i_a10s) = {
65c8e743c1SJagan Teki 	.name		= "sun5i_a10s_ccu",
66c8e743c1SJagan Teki 	.id		= UCLASS_CLK,
67c8e743c1SJagan Teki 	.of_match	= a10s_ccu_ids,
68c8e743c1SJagan Teki 	.priv_auto_alloc_size	= sizeof(struct ccu_priv),
69c8e743c1SJagan Teki 	.ops		= &sunxi_clk_ops,
70c8e743c1SJagan Teki 	.probe		= sunxi_clk_probe,
71c8e743c1SJagan Teki 	.bind		= a10s_clk_bind,
72c8e743c1SJagan Teki };
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