xref: /openbmc/u-boot/drivers/clk/sunxi/clk_a10.c (revision bb3e5aa2)
16590bd8cSJagan Teki // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
26590bd8cSJagan Teki /*
36590bd8cSJagan Teki  * Copyright (C) 2018 Amarula Solutions.
46590bd8cSJagan Teki  * Author: Jagan Teki <jagan@amarulasolutions.com>
56590bd8cSJagan Teki  */
66590bd8cSJagan Teki 
76590bd8cSJagan Teki #include <common.h>
86590bd8cSJagan Teki #include <clk-uclass.h>
96590bd8cSJagan Teki #include <dm.h>
106590bd8cSJagan Teki #include <errno.h>
116590bd8cSJagan Teki #include <asm/arch/ccu.h>
126590bd8cSJagan Teki #include <dt-bindings/clock/sun4i-a10-ccu.h>
136590bd8cSJagan Teki #include <dt-bindings/reset/sun4i-a10-ccu.h>
146590bd8cSJagan Teki 
156590bd8cSJagan Teki static struct ccu_clk_gate a10_gates[] = {
166590bd8cSJagan Teki 	[CLK_AHB_OTG]		= GATE(0x060, BIT(0)),
176590bd8cSJagan Teki 	[CLK_AHB_EHCI0]		= GATE(0x060, BIT(1)),
186590bd8cSJagan Teki 	[CLK_AHB_OHCI0]		= GATE(0x060, BIT(2)),
196590bd8cSJagan Teki 	[CLK_AHB_EHCI1]		= GATE(0x060, BIT(3)),
206590bd8cSJagan Teki 	[CLK_AHB_OHCI1]		= GATE(0x060, BIT(4)),
21*bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC0]		= GATE(0x060, BIT(8)),
22*bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC1]		= GATE(0x060, BIT(9)),
23*bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC2]		= GATE(0x060, BIT(10)),
24*bb3e5aa2SAndre Przywara 	[CLK_AHB_MMC3]		= GATE(0x060, BIT(11)),
256590bd8cSJagan Teki 
264acc7119SJagan Teki 	[CLK_APB1_UART0]	= GATE(0x06c, BIT(16)),
274acc7119SJagan Teki 	[CLK_APB1_UART1]	= GATE(0x06c, BIT(17)),
284acc7119SJagan Teki 	[CLK_APB1_UART2]	= GATE(0x06c, BIT(18)),
294acc7119SJagan Teki 	[CLK_APB1_UART3]	= GATE(0x06c, BIT(19)),
304acc7119SJagan Teki 	[CLK_APB1_UART4]	= GATE(0x06c, BIT(20)),
314acc7119SJagan Teki 	[CLK_APB1_UART5]	= GATE(0x06c, BIT(21)),
324acc7119SJagan Teki 	[CLK_APB1_UART6]	= GATE(0x06c, BIT(22)),
334acc7119SJagan Teki 	[CLK_APB1_UART7]	= GATE(0x06c, BIT(23)),
344acc7119SJagan Teki 
356590bd8cSJagan Teki 	[CLK_USB_OHCI0]		= GATE(0x0cc, BIT(6)),
366590bd8cSJagan Teki 	[CLK_USB_OHCI1]		= GATE(0x0cc, BIT(7)),
376590bd8cSJagan Teki 	[CLK_USB_PHY]		= GATE(0x0cc, BIT(8)),
386590bd8cSJagan Teki };
396590bd8cSJagan Teki 
406590bd8cSJagan Teki static struct ccu_reset a10_resets[] = {
416590bd8cSJagan Teki 	[RST_USB_PHY0]		= RESET(0x0cc, BIT(0)),
426590bd8cSJagan Teki 	[RST_USB_PHY1]		= RESET(0x0cc, BIT(1)),
436590bd8cSJagan Teki 	[RST_USB_PHY2]		= RESET(0x0cc, BIT(2)),
446590bd8cSJagan Teki };
456590bd8cSJagan Teki 
466590bd8cSJagan Teki static const struct ccu_desc a10_ccu_desc = {
476590bd8cSJagan Teki 	.gates = a10_gates,
486590bd8cSJagan Teki 	.resets = a10_resets,
496590bd8cSJagan Teki };
506590bd8cSJagan Teki 
516590bd8cSJagan Teki static int a10_clk_bind(struct udevice *dev)
526590bd8cSJagan Teki {
536590bd8cSJagan Teki 	return sunxi_reset_bind(dev, ARRAY_SIZE(a10_resets));
546590bd8cSJagan Teki }
556590bd8cSJagan Teki 
566590bd8cSJagan Teki static const struct udevice_id a10_ccu_ids[] = {
576590bd8cSJagan Teki 	{ .compatible = "allwinner,sun4i-a10-ccu",
586590bd8cSJagan Teki 	  .data = (ulong)&a10_ccu_desc },
596590bd8cSJagan Teki 	{ .compatible = "allwinner,sun7i-a20-ccu",
606590bd8cSJagan Teki 	  .data = (ulong)&a10_ccu_desc },
616590bd8cSJagan Teki 	{ }
626590bd8cSJagan Teki };
636590bd8cSJagan Teki 
646590bd8cSJagan Teki U_BOOT_DRIVER(clk_sun4i_a10) = {
656590bd8cSJagan Teki 	.name		= "sun4i_a10_ccu",
666590bd8cSJagan Teki 	.id		= UCLASS_CLK,
676590bd8cSJagan Teki 	.of_match	= a10_ccu_ids,
686590bd8cSJagan Teki 	.priv_auto_alloc_size	= sizeof(struct ccu_priv),
696590bd8cSJagan Teki 	.ops		= &sunxi_clk_ops,
706590bd8cSJagan Teki 	.probe		= sunxi_clk_probe,
716590bd8cSJagan Teki 	.bind		= a10_clk_bind,
726590bd8cSJagan Teki };
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