xref: /openbmc/u-boot/drivers/clk/exynos/clk-pll.h (revision 166097e8)
1*166097e8SThomas Abraham /*
2*166097e8SThomas Abraham  * Exynos PLL helper functions for clock drivers.
3*166097e8SThomas Abraham  * Copyright (C) 2016 Samsung Electronics
4*166097e8SThomas Abraham  * Thomas Abraham <thomas.ab@samsung.com>
5*166097e8SThomas Abraham  *
6*166097e8SThomas Abraham  * SPDX-License-Identifier:	GPL-2.0+
7*166097e8SThomas Abraham  */
8*166097e8SThomas Abraham 
9*166097e8SThomas Abraham unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);
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