xref: /openbmc/u-boot/drivers/clk/exynos/clk-pll.h (revision e8f80a5a)
1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */
2166097e8SThomas Abraham /*
3166097e8SThomas Abraham  * Exynos PLL helper functions for clock drivers.
4166097e8SThomas Abraham  * Copyright (C) 2016 Samsung Electronics
5166097e8SThomas Abraham  * Thomas Abraham <thomas.ab@samsung.com>
6166097e8SThomas Abraham  */
7166097e8SThomas Abraham 
8166097e8SThomas Abraham unsigned long pll145x_get_rate(unsigned int *con1, unsigned long fin_freq);
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