1 /* 2 * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <clk-uclass.h> 9 #include <dm.h> 10 11 DECLARE_GLOBAL_DATA_PTR; 12 13 struct clk_fixed_rate { 14 unsigned long fixed_rate; 15 }; 16 17 #define to_clk_fixed_rate(dev) ((struct clk_fixed_rate *)dev_get_platdata(dev)) 18 19 static ulong clk_fixed_rate_get_rate(struct clk *clk) 20 { 21 if (clk->id != 0) 22 return -EINVAL; 23 24 return to_clk_fixed_rate(clk->dev)->fixed_rate; 25 } 26 27 const struct clk_ops clk_fixed_rate_ops = { 28 .get_rate = clk_fixed_rate_get_rate, 29 }; 30 31 static int clk_fixed_rate_ofdata_to_platdata(struct udevice *dev) 32 { 33 #if !CONFIG_IS_ENABLED(OF_PLATDATA) 34 to_clk_fixed_rate(dev)->fixed_rate = dev_read_u32_default(dev, 35 "clock-frequency", 0); 36 #endif 37 38 return 0; 39 } 40 41 static const struct udevice_id clk_fixed_rate_match[] = { 42 { 43 .compatible = "fixed-clock", 44 }, 45 { /* sentinel */ } 46 }; 47 48 U_BOOT_DRIVER(clk_fixed_rate) = { 49 .name = "fixed_rate_clock", 50 .id = UCLASS_CLK, 51 .of_match = clk_fixed_rate_match, 52 .ofdata_to_platdata = clk_fixed_rate_ofdata_to_platdata, 53 .platdata_auto_alloc_size = sizeof(struct clk_fixed_rate), 54 .ops = &clk_fixed_rate_ops, 55 }; 56