xref: /openbmc/u-boot/drivers/clk/clk-uclass.c (revision 01c541e0)
1 /*
2  * Copyright (C) 2015 Google, Inc
3  * Written by Simon Glass <sjg@chromium.org>
4  * Copyright (c) 2016, NVIDIA CORPORATION.
5  *
6  * SPDX-License-Identifier:	GPL-2.0+
7  */
8 
9 #include <common.h>
10 #include <clk.h>
11 #include <clk-uclass.h>
12 #include <dm.h>
13 #include <dt-structs.h>
14 #include <errno.h>
15 
16 DECLARE_GLOBAL_DATA_PTR;
17 
18 static inline struct clk_ops *clk_dev_ops(struct udevice *dev)
19 {
20 	return (struct clk_ops *)dev->driver->ops;
21 }
22 
23 #if CONFIG_IS_ENABLED(OF_CONTROL)
24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
25 int clk_get_by_index_platdata(struct udevice *dev, int index,
26 			      struct phandle_1_arg *cells, struct clk *clk)
27 {
28 	int ret;
29 
30 	if (index != 0)
31 		return -ENOSYS;
32 	ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
33 	if (ret)
34 		return ret;
35 	clk->id = cells[0].arg[0];
36 
37 	return 0;
38 }
39 # else
40 static int clk_of_xlate_default(struct clk *clk,
41 				struct ofnode_phandle_args *args)
42 {
43 	debug("%s(clk=%p)\n", __func__, clk);
44 
45 	if (args->args_count > 1) {
46 		debug("Invaild args_count: %d\n", args->args_count);
47 		return -EINVAL;
48 	}
49 
50 	if (args->args_count)
51 		clk->id = args->args[0];
52 	else
53 		clk->id = 0;
54 
55 	return 0;
56 }
57 
58 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
59 {
60 	int ret;
61 	struct ofnode_phandle_args args;
62 	struct udevice *dev_clk;
63 	struct clk_ops *ops;
64 
65 	debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
66 
67 	assert(clk);
68 	clk->dev = NULL;
69 
70 	ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
71 					  index, &args);
72 	if (ret) {
73 		debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
74 		      __func__, ret);
75 		return ret;
76 	}
77 
78 	ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &dev_clk);
79 	if (ret) {
80 		debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
81 		      __func__, ret);
82 		return ret;
83 	}
84 
85 	clk->dev = dev_clk;
86 
87 	ops = clk_dev_ops(dev_clk);
88 
89 	if (ops->of_xlate)
90 		ret = ops->of_xlate(clk, &args);
91 	else
92 		ret = clk_of_xlate_default(clk, &args);
93 	if (ret) {
94 		debug("of_xlate() failed: %d\n", ret);
95 		return ret;
96 	}
97 
98 	return clk_request(dev_clk, clk);
99 }
100 # endif /* OF_PLATDATA */
101 
102 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
103 {
104 	int index;
105 
106 	debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
107 	clk->dev = NULL;
108 
109 	index = dev_read_stringlist_search(dev, "clock-names", name);
110 	if (index < 0) {
111 		debug("fdt_stringlist_search() failed: %d\n", index);
112 		return index;
113 	}
114 
115 	return clk_get_by_index(dev, index, clk);
116 }
117 
118 int clk_release_all(struct clk *clk, int count)
119 {
120 	int i, ret;
121 
122 	for (i = 0; i < count; i++) {
123 		debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
124 
125 		/* check if clock has been previously requested */
126 		if (!clk[i].dev)
127 			continue;
128 
129 		ret = clk_disable(&clk[i]);
130 		if (ret && ret != -ENOSYS)
131 			return ret;
132 
133 		ret = clk_free(&clk[i]);
134 		if (ret && ret != -ENOSYS)
135 			return ret;
136 	}
137 
138 	return 0;
139 }
140 
141 #endif /* OF_CONTROL */
142 
143 int clk_request(struct udevice *dev, struct clk *clk)
144 {
145 	struct clk_ops *ops = clk_dev_ops(dev);
146 
147 	debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
148 
149 	clk->dev = dev;
150 
151 	if (!ops->request)
152 		return 0;
153 
154 	return ops->request(clk);
155 }
156 
157 int clk_free(struct clk *clk)
158 {
159 	struct clk_ops *ops = clk_dev_ops(clk->dev);
160 
161 	debug("%s(clk=%p)\n", __func__, clk);
162 
163 	if (!ops->free)
164 		return 0;
165 
166 	return ops->free(clk);
167 }
168 
169 ulong clk_get_rate(struct clk *clk)
170 {
171 	struct clk_ops *ops = clk_dev_ops(clk->dev);
172 
173 	debug("%s(clk=%p)\n", __func__, clk);
174 
175 	if (!ops->get_rate)
176 		return -ENOSYS;
177 
178 	return ops->get_rate(clk);
179 }
180 
181 ulong clk_set_rate(struct clk *clk, ulong rate)
182 {
183 	struct clk_ops *ops = clk_dev_ops(clk->dev);
184 
185 	debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
186 
187 	if (!ops->set_rate)
188 		return -ENOSYS;
189 
190 	return ops->set_rate(clk, rate);
191 }
192 
193 int clk_enable(struct clk *clk)
194 {
195 	struct clk_ops *ops = clk_dev_ops(clk->dev);
196 
197 	debug("%s(clk=%p)\n", __func__, clk);
198 
199 	if (!ops->enable)
200 		return -ENOSYS;
201 
202 	return ops->enable(clk);
203 }
204 
205 int clk_disable(struct clk *clk)
206 {
207 	struct clk_ops *ops = clk_dev_ops(clk->dev);
208 
209 	debug("%s(clk=%p)\n", __func__, clk);
210 
211 	if (!ops->disable)
212 		return -ENOSYS;
213 
214 	return ops->disable(clk);
215 }
216 
217 UCLASS_DRIVER(clk) = {
218 	.id		= UCLASS_CLK,
219 	.name		= "clk",
220 };
221