1*9e5935c0SWenyou Yangconfig CLK_AT91 2*9e5935c0SWenyou Yang bool "AT91 clock drivers" 3*9e5935c0SWenyou Yang depends on CLK 4*9e5935c0SWenyou Yang help 5*9e5935c0SWenyou Yang This option is used to enable the AT91 clock driver. 6*9e5935c0SWenyou Yang The driver supports the AT91 clock generator, including 7*9e5935c0SWenyou Yang the oscillators and PLLs, such as main clock, slow clock, 8*9e5935c0SWenyou Yang PLLA, UTMI PLL. Clocks can also be a source clock of other 9*9e5935c0SWenyou Yang clocks a tree structure, such as master clock, usb device 10*9e5935c0SWenyou Yang clock, matrix clock and generic clock. 11*9e5935c0SWenyou Yang Devices can use a common clock API to request a particular 12*9e5935c0SWenyou Yang clock, enable it and get its rate. 13*9e5935c0SWenyou Yang 14*9e5935c0SWenyou Yangconfig AT91_UTMI 15*9e5935c0SWenyou Yang bool "Support UTMI PLL Clock" 16*9e5935c0SWenyou Yang depends on CLK_AT91 17*9e5935c0SWenyou Yang help 18*9e5935c0SWenyou Yang This option is used to enable the AT91 UTMI PLL clock 19*9e5935c0SWenyou Yang driver. It is the clock provider of USB, and UPLLCK is the 20*9e5935c0SWenyou Yang output of 480 MHz UTMI PLL, The souce clock of the UTMI 21*9e5935c0SWenyou Yang PLL is the main clock, so the main clock must select the 22*9e5935c0SWenyou Yang fast crystal oscillator to meet the frequency accuracy 23*9e5935c0SWenyou Yang required by USB. 24*9e5935c0SWenyou Yang 25*9e5935c0SWenyou Yangconfig AT91_H32MX 26*9e5935c0SWenyou Yang bool "Support H32MX 32-bit Matrix Clock" 27*9e5935c0SWenyou Yang depends on CLK_AT91 28*9e5935c0SWenyou Yang help 29*9e5935c0SWenyou Yang This option is used to enable the AT91 H32MX matrixes 30*9e5935c0SWenyou Yang clock driver. There are H64MX and H32MX matrixes clocks, 31*9e5935c0SWenyou Yang H64MX 64-bit matrix clocks are MCK. The H32MX 32-bit 32*9e5935c0SWenyou Yang matrix clock is to be configured as MCK if MCK does not 33*9e5935c0SWenyou Yang exceed 83 MHz, else it is to be configured as MCK/2. 34*9e5935c0SWenyou Yang 35*9e5935c0SWenyou Yangconfig AT91_GENERIC_CLK 36*9e5935c0SWenyou Yang bool "Support Generic Clock" 37*9e5935c0SWenyou Yang depends on CLK_AT91 38*9e5935c0SWenyou Yang help 39*9e5935c0SWenyou Yang This option is used to enable the AT91 generic clock 40*9e5935c0SWenyou Yang driver. Some peripherals may need a second clock source 41*9e5935c0SWenyou Yang that may be different from the system clock. This second 42*9e5935c0SWenyou Yang clock is the generic clock (GCLK) and is managed by 43*9e5935c0SWenyou Yang the PMC via PMC_PCR register. 44