1 /**************************************************************************** 2 * 3 * BIOS emulator and interface 4 * to Realmode X86 Emulator Library 5 * 6 * Copyright (C) 2007 Freescale Semiconductor, Inc. 7 * Jason Jin <Jason.jin@freescale.com> 8 * 9 * Copyright (C) 1996-1999 SciTech Software, Inc. 10 * 11 * ======================================================================== 12 * 13 * Permission to use, copy, modify, distribute, and sell this software and 14 * its documentation for any purpose is hereby granted without fee, 15 * provided that the above copyright notice appear in all copies and that 16 * both that copyright notice and this permission notice appear in 17 * supporting documentation, and that the name of the authors not be used 18 * in advertising or publicity pertaining to distribution of the software 19 * without specific, written prior permission. The authors makes no 20 * representations about the suitability of this software for any purpose. 21 * It is provided "as is" without express or implied warranty. 22 * 23 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 24 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 25 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 26 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 27 * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 28 * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 29 * PERFORMANCE OF THIS SOFTWARE. 30 * 31 * ======================================================================== 32 * 33 * Language: ANSI C 34 * Environment: Any 35 * Developer: Kendall Bennett 36 * 37 * Description: Module implementing the BIOS specific functions. 38 * 39 * Jason ported this file to u-boot to run the ATI video card 40 * video BIOS. 41 * 42 ****************************************************************************/ 43 44 #include <common.h> 45 #include "biosemui.h" 46 47 /*----------------------------- Implementation ----------------------------*/ 48 49 /**************************************************************************** 50 PARAMETERS: 51 intno - Interrupt number being serviced 52 53 REMARKS: 54 Handler for undefined interrupts. 55 ****************************************************************************/ 56 static void X86API undefined_intr(int intno) 57 { 58 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) { 59 DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);) 60 } else 61 X86EMU_prepareForInt(intno); 62 } 63 64 /**************************************************************************** 65 PARAMETERS: 66 intno - Interrupt number being serviced 67 68 REMARKS: 69 This function handles the default system BIOS Int 10h (the default is stored 70 in the Int 42h vector by the system BIOS at bootup). We only need to handle 71 a small number of special functions used by the BIOS during POST time. 72 ****************************************************************************/ 73 static void X86API int42(int intno) 74 { 75 if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) { 76 if (M.x86.R_AL == 0) { 77 /* Enable CPU accesses to video memory */ 78 PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02); 79 return; 80 } else if (M.x86.R_AL == 1) { 81 /* Disable CPU accesses to video memory */ 82 PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02); 83 return; 84 } 85 #ifdef DEBUG 86 else { 87 printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n", 88 M.x86.R_AL); 89 } 90 #endif 91 } 92 #ifdef DEBUG 93 else { 94 printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n", 95 M.x86.R_AH, M.x86.R_AL, M.x86.R_BL); 96 } 97 #endif 98 } 99 100 /**************************************************************************** 101 PARAMETERS: 102 intno - Interrupt number being serviced 103 104 REMARKS: 105 This function handles the default system BIOS Int 10h. If the POST code 106 has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this 107 by simply calling the int42 interrupt handler above. Very early in the 108 BIOS POST process, the vector gets replaced and we simply let the real 109 mode interrupt handler process the interrupt. 110 ****************************************************************************/ 111 static void X86API int10(int intno) 112 { 113 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) 114 int42(intno); 115 else 116 X86EMU_prepareForInt(intno); 117 } 118 119 /* Result codes returned by the PCI BIOS */ 120 121 #define SUCCESSFUL 0x00 122 #define FUNC_NOT_SUPPORT 0x81 123 #define BAD_VENDOR_ID 0x83 124 #define DEVICE_NOT_FOUND 0x86 125 #define BAD_REGISTER_NUMBER 0x87 126 #define SET_FAILED 0x88 127 #define BUFFER_TOO_SMALL 0x89 128 129 /**************************************************************************** 130 PARAMETERS: 131 intno - Interrupt number being serviced 132 133 REMARKS: 134 This function handles the default Int 1Ah interrupt handler for the real 135 mode code, which provides support for the PCI BIOS functions. Since we only 136 want to allow the real mode BIOS code *only* see the PCI config space for 137 its own device, we only return information for the specific PCI config 138 space that we have passed in to the init function. This solves problems 139 when using the BIOS to warm boot a secondary adapter when there is an 140 identical adapter before it on the bus (some BIOS'es get confused in this 141 case). 142 ****************************************************************************/ 143 static void X86API int1A(int unused) 144 { 145 u16 pciSlot; 146 147 #ifdef __KERNEL__ 148 u8 interface, subclass, baseclass; 149 150 /* Initialise the PCI slot number */ 151 pciSlot = ((int)_BE_env.vgaInfo.bus << 8) | 152 ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function; 153 #else 154 /* Fail if no PCI device information has been registered */ 155 if (!_BE_env.vgaInfo.pciInfo) 156 return; 157 158 pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8); 159 #endif 160 switch (M.x86.R_AX) { 161 case 0xB101: /* PCI bios present? */ 162 M.x86.R_AL = 0x00; /* no config space/special cycle generation support */ 163 M.x86.R_EDX = 0x20494350; /* " ICP" */ 164 M.x86.R_BX = 0x0210; /* Version 2.10 */ 165 M.x86.R_CL = 0; /* Max bus number in system */ 166 CLEAR_FLAG(F_CF); 167 break; 168 case 0xB102: /* Find PCI device */ 169 M.x86.R_AH = DEVICE_NOT_FOUND; 170 #ifdef __KERNEL__ 171 if (M.x86.R_DX == _BE_env.vgaInfo.VendorID && 172 M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) { 173 #else 174 if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID && 175 M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID && 176 M.x86.R_SI == 0) { 177 #endif 178 M.x86.R_AH = SUCCESSFUL; 179 M.x86.R_BX = pciSlot; 180 } 181 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 182 break; 183 case 0xB103: /* Find PCI class code */ 184 M.x86.R_AH = DEVICE_NOT_FOUND; 185 #ifdef __KERNEL__ 186 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG, 187 &interface); 188 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE, 189 &subclass); 190 pci_read_config_byte(_BE_env.vgaInfo.pcidev, 191 PCI_CLASS_DEVICE + 1, &baseclass); 192 if (M.x86.R_CL == interface && M.x86.R_CH == subclass 193 && (u8) (M.x86.R_ECX >> 16) == baseclass) { 194 #else 195 if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface && 196 M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass && 197 (u8) (M.x86.R_ECX >> 16) == 198 _BE_env.vgaInfo.pciInfo->BaseClass) { 199 #endif 200 M.x86.R_AH = SUCCESSFUL; 201 M.x86.R_BX = pciSlot; 202 } 203 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 204 break; 205 case 0xB108: /* Read configuration byte */ 206 M.x86.R_AH = BAD_REGISTER_NUMBER; 207 if (M.x86.R_BX == pciSlot) { 208 M.x86.R_AH = SUCCESSFUL; 209 #ifdef __KERNEL__ 210 pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI, 211 &M.x86.R_CL); 212 #else 213 M.x86.R_CL = 214 (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE, 215 _BE_env.vgaInfo.pciInfo); 216 #endif 217 } 218 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 219 break; 220 case 0xB109: /* Read configuration word */ 221 M.x86.R_AH = BAD_REGISTER_NUMBER; 222 if (M.x86.R_BX == pciSlot) { 223 M.x86.R_AH = SUCCESSFUL; 224 #ifdef __KERNEL__ 225 pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI, 226 &M.x86.R_CX); 227 #else 228 M.x86.R_CX = 229 (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD, 230 _BE_env.vgaInfo.pciInfo); 231 #endif 232 } 233 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 234 break; 235 case 0xB10A: /* Read configuration dword */ 236 M.x86.R_AH = BAD_REGISTER_NUMBER; 237 if (M.x86.R_BX == pciSlot) { 238 M.x86.R_AH = SUCCESSFUL; 239 #ifdef __KERNEL__ 240 pci_read_config_dword(_BE_env.vgaInfo.pcidev, 241 M.x86.R_DI, &M.x86.R_ECX); 242 #else 243 M.x86.R_ECX = 244 (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD, 245 _BE_env.vgaInfo.pciInfo); 246 #endif 247 } 248 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 249 break; 250 case 0xB10B: /* Write configuration byte */ 251 M.x86.R_AH = BAD_REGISTER_NUMBER; 252 if (M.x86.R_BX == pciSlot) { 253 M.x86.R_AH = SUCCESSFUL; 254 #ifdef __KERNEL__ 255 pci_write_config_byte(_BE_env.vgaInfo.pcidev, 256 M.x86.R_DI, M.x86.R_CL); 257 #else 258 PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE, 259 _BE_env.vgaInfo.pciInfo); 260 #endif 261 } 262 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 263 break; 264 case 0xB10C: /* Write configuration word */ 265 M.x86.R_AH = BAD_REGISTER_NUMBER; 266 if (M.x86.R_BX == pciSlot) { 267 M.x86.R_AH = SUCCESSFUL; 268 #ifdef __KERNEL__ 269 pci_write_config_word(_BE_env.vgaInfo.pcidev, 270 M.x86.R_DI, M.x86.R_CX); 271 #else 272 PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD, 273 _BE_env.vgaInfo.pciInfo); 274 #endif 275 } 276 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 277 break; 278 case 0xB10D: /* Write configuration dword */ 279 M.x86.R_AH = BAD_REGISTER_NUMBER; 280 if (M.x86.R_BX == pciSlot) { 281 M.x86.R_AH = SUCCESSFUL; 282 #ifdef __KERNEL__ 283 pci_write_config_dword(_BE_env.vgaInfo.pcidev, 284 M.x86.R_DI, M.x86.R_ECX); 285 #else 286 PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD, 287 _BE_env.vgaInfo.pciInfo); 288 #endif 289 } 290 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 291 break; 292 default: 293 printf("biosEmu/bios.int1a: unknown function AX=%#04x\n", 294 M.x86.R_AX); 295 } 296 } 297 298 /**************************************************************************** 299 REMARKS: 300 This function initialises the BIOS emulation functions for the specific 301 PCI display device. We insulate the real mode BIOS from any other devices 302 on the bus, so that it will work correctly thinking that it is the only 303 device present on the bus (ie: avoiding any adapters present in from of 304 the device we are trying to control). 305 ****************************************************************************/ 306 #define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16)) 307 308 void _BE_bios_init(u32 * intrTab) 309 { 310 int i; 311 X86EMU_intrFuncs bios_intr_tab[256]; 312 313 for (i = 0; i < 256; ++i) { 314 intrTab[i] = BE_constLE_32(BIOS_SEG << 16); 315 bios_intr_tab[i] = undefined_intr; 316 } 317 bios_intr_tab[0x10] = int10; 318 bios_intr_tab[0x1A] = int1A; 319 bios_intr_tab[0x42] = int42; 320 bios_intr_tab[0x6D] = int10; 321 X86EMU_setupIntrFuncs(bios_intr_tab); 322 } 323