1 /**************************************************************************** 2 * 3 * BIOS emulator and interface 4 * to Realmode X86 Emulator Library 5 * 6 * Copyright (C) 2007 Freescale Semiconductor, Inc. 7 * Jason Jin <Jason.jin@freescale.com> 8 * 9 * Copyright (C) 1996-1999 SciTech Software, Inc. 10 * 11 * ======================================================================== 12 * 13 * Permission to use, copy, modify, distribute, and sell this software and 14 * its documentation for any purpose is hereby granted without fee, 15 * provided that the above copyright notice appear in all copies and that 16 * both that copyright notice and this permission notice appear in 17 * supporting documentation, and that the name of the authors not be used 18 * in advertising or publicity pertaining to distribution of the software 19 * without specific, written prior permission. The authors makes no 20 * representations about the suitability of this software for any purpose. 21 * It is provided "as is" without express or implied warranty. 22 * 23 * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 24 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 25 * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 26 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 27 * USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 28 * OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 29 * PERFORMANCE OF THIS SOFTWARE. 30 * 31 * ======================================================================== 32 * 33 * Language: ANSI C 34 * Environment: Any 35 * Developer: Kendall Bennett 36 * 37 * Description: Module implementing the BIOS specific functions. 38 * 39 * Jason ported this file to u-boot to run the ATI video card 40 * video BIOS. 41 * 42 ****************************************************************************/ 43 44 #define __io 45 #include <common.h> 46 #include <asm/io.h> 47 #include "biosemui.h" 48 49 /*----------------------------- Implementation ----------------------------*/ 50 51 /**************************************************************************** 52 PARAMETERS: 53 intno - Interrupt number being serviced 54 55 REMARKS: 56 Handler for undefined interrupts. 57 ****************************************************************************/ 58 static void X86API undefined_intr(int intno) 59 { 60 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) { 61 DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);) 62 } else 63 X86EMU_prepareForInt(intno); 64 } 65 66 /**************************************************************************** 67 PARAMETERS: 68 intno - Interrupt number being serviced 69 70 REMARKS: 71 This function handles the default system BIOS Int 10h (the default is stored 72 in the Int 42h vector by the system BIOS at bootup). We only need to handle 73 a small number of special functions used by the BIOS during POST time. 74 ****************************************************************************/ 75 static void X86API int42(int intno) 76 { 77 if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) { 78 if (M.x86.R_AL == 0) { 79 /* Enable CPU accesses to video memory */ 80 PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02); 81 return; 82 } else if (M.x86.R_AL == 1) { 83 /* Disable CPU accesses to video memory */ 84 PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02); 85 return; 86 } 87 #ifdef CONFIG_X86EMU_DEBUG 88 else { 89 printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n", 90 M.x86.R_AL); 91 } 92 #endif 93 } 94 #ifdef CONFIG_X86EMU_DEBUG 95 else { 96 printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n", 97 M.x86.R_AH, M.x86.R_AL, M.x86.R_BL); 98 } 99 #endif 100 } 101 102 /**************************************************************************** 103 PARAMETERS: 104 intno - Interrupt number being serviced 105 106 REMARKS: 107 This function handles the default system BIOS Int 10h. If the POST code 108 has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this 109 by simply calling the int42 interrupt handler above. Very early in the 110 BIOS POST process, the vector gets replaced and we simply let the real 111 mode interrupt handler process the interrupt. 112 ****************************************************************************/ 113 static void X86API int10(int intno) 114 { 115 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) 116 int42(intno); 117 else 118 X86EMU_prepareForInt(intno); 119 } 120 121 /* Result codes returned by the PCI BIOS */ 122 123 #define SUCCESSFUL 0x00 124 #define FUNC_NOT_SUPPORT 0x81 125 #define BAD_VENDOR_ID 0x83 126 #define DEVICE_NOT_FOUND 0x86 127 #define BAD_REGISTER_NUMBER 0x87 128 #define SET_FAILED 0x88 129 #define BUFFER_TOO_SMALL 0x89 130 131 /**************************************************************************** 132 PARAMETERS: 133 intno - Interrupt number being serviced 134 135 REMARKS: 136 This function handles the default Int 1Ah interrupt handler for the real 137 mode code, which provides support for the PCI BIOS functions. Since we only 138 want to allow the real mode BIOS code *only* see the PCI config space for 139 its own device, we only return information for the specific PCI config 140 space that we have passed in to the init function. This solves problems 141 when using the BIOS to warm boot a secondary adapter when there is an 142 identical adapter before it on the bus (some BIOS'es get confused in this 143 case). 144 ****************************************************************************/ 145 static void X86API int1A(int unused) 146 { 147 u16 pciSlot; 148 149 #ifdef __KERNEL__ 150 u8 interface, subclass, baseclass; 151 152 /* Initialise the PCI slot number */ 153 pciSlot = ((int)_BE_env.vgaInfo.bus << 8) | 154 ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function; 155 #else 156 /* Fail if no PCI device information has been registered */ 157 if (!_BE_env.vgaInfo.pciInfo) 158 return; 159 160 pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8); 161 #endif 162 switch (M.x86.R_AX) { 163 case 0xB101: /* PCI bios present? */ 164 M.x86.R_AL = 0x00; /* no config space/special cycle generation support */ 165 M.x86.R_EDX = 0x20494350; /* " ICP" */ 166 M.x86.R_BX = 0x0210; /* Version 2.10 */ 167 M.x86.R_CL = 0; /* Max bus number in system */ 168 CLEAR_FLAG(F_CF); 169 break; 170 case 0xB102: /* Find PCI device */ 171 M.x86.R_AH = DEVICE_NOT_FOUND; 172 #ifdef __KERNEL__ 173 if (M.x86.R_DX == _BE_env.vgaInfo.VendorID && 174 M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) { 175 #else 176 if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID && 177 M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID && 178 M.x86.R_SI == 0) { 179 #endif 180 M.x86.R_AH = SUCCESSFUL; 181 M.x86.R_BX = pciSlot; 182 } 183 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 184 break; 185 case 0xB103: /* Find PCI class code */ 186 M.x86.R_AH = DEVICE_NOT_FOUND; 187 #ifdef __KERNEL__ 188 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG, 189 &interface); 190 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE, 191 &subclass); 192 pci_read_config_byte(_BE_env.vgaInfo.pcidev, 193 PCI_CLASS_DEVICE + 1, &baseclass); 194 if (M.x86.R_CL == interface && M.x86.R_CH == subclass 195 && (u8) (M.x86.R_ECX >> 16) == baseclass) { 196 #else 197 if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface && 198 M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass && 199 (u8) (M.x86.R_ECX >> 16) == 200 _BE_env.vgaInfo.pciInfo->BaseClass) { 201 #endif 202 M.x86.R_AH = SUCCESSFUL; 203 M.x86.R_BX = pciSlot; 204 } 205 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 206 break; 207 case 0xB108: /* Read configuration byte */ 208 M.x86.R_AH = BAD_REGISTER_NUMBER; 209 if (M.x86.R_BX == pciSlot) { 210 M.x86.R_AH = SUCCESSFUL; 211 #ifdef __KERNEL__ 212 pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI, 213 &M.x86.R_CL); 214 #else 215 M.x86.R_CL = 216 (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE, 217 _BE_env.vgaInfo.pciInfo); 218 #endif 219 } 220 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 221 break; 222 case 0xB109: /* Read configuration word */ 223 M.x86.R_AH = BAD_REGISTER_NUMBER; 224 if (M.x86.R_BX == pciSlot) { 225 M.x86.R_AH = SUCCESSFUL; 226 #ifdef __KERNEL__ 227 pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI, 228 &M.x86.R_CX); 229 #else 230 M.x86.R_CX = 231 (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD, 232 _BE_env.vgaInfo.pciInfo); 233 #endif 234 } 235 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 236 break; 237 case 0xB10A: /* Read configuration dword */ 238 M.x86.R_AH = BAD_REGISTER_NUMBER; 239 if (M.x86.R_BX == pciSlot) { 240 M.x86.R_AH = SUCCESSFUL; 241 #ifdef __KERNEL__ 242 pci_read_config_dword(_BE_env.vgaInfo.pcidev, 243 M.x86.R_DI, &M.x86.R_ECX); 244 #else 245 M.x86.R_ECX = 246 (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD, 247 _BE_env.vgaInfo.pciInfo); 248 #endif 249 } 250 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 251 break; 252 case 0xB10B: /* Write configuration byte */ 253 M.x86.R_AH = BAD_REGISTER_NUMBER; 254 if (M.x86.R_BX == pciSlot) { 255 M.x86.R_AH = SUCCESSFUL; 256 #ifdef __KERNEL__ 257 pci_write_config_byte(_BE_env.vgaInfo.pcidev, 258 M.x86.R_DI, M.x86.R_CL); 259 #else 260 PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE, 261 _BE_env.vgaInfo.pciInfo); 262 #endif 263 } 264 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 265 break; 266 case 0xB10C: /* Write configuration word */ 267 M.x86.R_AH = BAD_REGISTER_NUMBER; 268 if (M.x86.R_BX == pciSlot) { 269 M.x86.R_AH = SUCCESSFUL; 270 #ifdef __KERNEL__ 271 pci_write_config_word(_BE_env.vgaInfo.pcidev, 272 M.x86.R_DI, M.x86.R_CX); 273 #else 274 PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD, 275 _BE_env.vgaInfo.pciInfo); 276 #endif 277 } 278 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 279 break; 280 case 0xB10D: /* Write configuration dword */ 281 M.x86.R_AH = BAD_REGISTER_NUMBER; 282 if (M.x86.R_BX == pciSlot) { 283 M.x86.R_AH = SUCCESSFUL; 284 #ifdef __KERNEL__ 285 pci_write_config_dword(_BE_env.vgaInfo.pcidev, 286 M.x86.R_DI, M.x86.R_ECX); 287 #else 288 PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD, 289 _BE_env.vgaInfo.pciInfo); 290 #endif 291 } 292 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); 293 break; 294 default: 295 printf("biosEmu/bios.int1a: unknown function AX=%#04x\n", 296 M.x86.R_AX); 297 } 298 } 299 300 /**************************************************************************** 301 REMARKS: 302 This function initialises the BIOS emulation functions for the specific 303 PCI display device. We insulate the real mode BIOS from any other devices 304 on the bus, so that it will work correctly thinking that it is the only 305 device present on the bus (ie: avoiding any adapters present in from of 306 the device we are trying to control). 307 ****************************************************************************/ 308 #define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16)) 309 310 void _BE_bios_init(u32 * intrTab) 311 { 312 int i; 313 X86EMU_intrFuncs bios_intr_tab[256]; 314 315 for (i = 0; i < 256; ++i) { 316 intrTab[i] = BE_constLE_32(BIOS_SEG << 16); 317 bios_intr_tab[i] = undefined_intr; 318 } 319 bios_intr_tab[0x10] = int10; 320 bios_intr_tab[0x1A] = int1A; 321 bios_intr_tab[0x42] = int42; 322 bios_intr_tab[0x6D] = int10; 323 X86EMU_setupIntrFuncs(bios_intr_tab); 324 } 325