1 /**************************************************************************** 2 * 3 * Video BOOT Graphics Card POST Module 4 * 5 * ======================================================================== 6 * Copyright (C) 2007 Freescale Semiconductor, Inc. 7 * Jason Jin <Jason.jin@freescale.com> 8 * 9 * Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved. 10 * 11 * This file may be distributed and/or modified under the terms of the 12 * GNU General Public License version 2.0 as published by the Free 13 * Software Foundation and appearing in the file LICENSE.GPL included 14 * in the packaging of this file. 15 * 16 * Licensees holding a valid Commercial License for this product from 17 * SciTech Software, Inc. may use this file in accordance with the 18 * Commercial License Agreement provided with the Software. 19 * 20 * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING 21 * THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE. 23 * 24 * See http://www.scitechsoft.com/license/ for information about 25 * the licensing options available and how to purchase a Commercial 26 * License Agreement. 27 * 28 * Contact license@scitechsoft.com if any conditions of this licensing 29 * are not clear to you, or you have questions about licensing options. 30 * 31 * ======================================================================== 32 * 33 * Language: ANSI C 34 * Environment: Linux Kernel 35 * Developer: Kendall Bennett 36 * 37 * Description: Module to implement booting PCI/AGP controllers on the 38 * bus. We use the x86 real mode emulator to run the BIOS on 39 * graphics controllers to bring the cards up. 40 * 41 * Note that at present this module does *not* support 42 * multiple controllers. 43 * 44 * The orignal name of this file is warmboot.c. 45 * Jason ported this file to u-boot to run the ATI video card 46 * BIOS in u-boot. 47 ****************************************************************************/ 48 #include <common.h> 49 #include <bios_emul.h> 50 #include <errno.h> 51 #include <malloc.h> 52 #include <vbe.h> 53 #include "biosemui.h" 54 55 /* Length of the BIOS image */ 56 #define MAX_BIOSLEN (128 * 1024L) 57 58 /* Place to save PCI BAR's that we change and later restore */ 59 static u32 saveROMBaseAddress; 60 static u32 saveBaseAddress10; 61 static u32 saveBaseAddress14; 62 static u32 saveBaseAddress18; 63 static u32 saveBaseAddress20; 64 65 /* Addres im memory of VBE region */ 66 const int vbe_offset = 0x2000; 67 68 #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE 69 static const void *bios_ptr(const void *buf, BE_VGAInfo *vga_info, 70 u32 x86_dword_ptr) 71 { 72 u32 seg_ofs, flat; 73 74 seg_ofs = le32_to_cpu(x86_dword_ptr); 75 flat = ((seg_ofs & 0xffff0000) >> 12) | (seg_ofs & 0xffff); 76 if (flat >= 0xc0000) 77 return vga_info->BIOSImage + flat - 0xc0000; 78 else 79 return buf + (flat - vbe_offset); 80 } 81 82 static int atibios_debug_mode(BE_VGAInfo *vga_info, RMREGS *regs, 83 int vesa_mode, struct vbe_mode_info *mode_info) 84 { 85 void *buffer = (void *)(M.mem_base + vbe_offset); 86 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00; 87 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; 88 struct vesa_mode_info *vm; 89 struct vbe_info *info; 90 const u16 *modes_bios, *ptr; 91 u16 *modes; 92 int size; 93 94 debug("VBE: Getting information\n"); 95 regs->e.eax = VESA_GET_INFO; 96 regs->e.esi = buffer_seg; 97 regs->e.edi = buffer_adr; 98 info = buffer; 99 memset(info, '\0', sizeof(*info)); 100 strcpy(info->signature, "VBE2"); 101 BE_int86(0x10, regs, regs); 102 if (regs->e.eax != 0x4f) { 103 debug("VESA_GET_INFO: error %x\n", regs->e.eax); 104 return -ENOSYS; 105 } 106 debug("version %x\n", le16_to_cpu(info->version)); 107 debug("oem '%s'\n", (char *)bios_ptr(buffer, vga_info, 108 info->oem_string_ptr)); 109 debug("vendor '%s'\n", (char *)bios_ptr(buffer, vga_info, 110 info->vendor_name_ptr)); 111 debug("product '%s'\n", (char *)bios_ptr(buffer, vga_info, 112 info->product_name_ptr)); 113 debug("rev '%s'\n", (char *)bios_ptr(buffer, vga_info, 114 info->product_rev_ptr)); 115 modes_bios = bios_ptr(buffer, vga_info, info->modes_ptr); 116 debug("Modes: "); 117 for (ptr = modes_bios; *ptr != 0xffff; ptr++) 118 debug("%x ", le16_to_cpu(*ptr)); 119 debug("\nmemory %dMB\n", le16_to_cpu(info->total_memory) >> 4); 120 size = (ptr - modes_bios) * sizeof(u16) + 2; 121 modes = malloc(size); 122 if (!modes) 123 return -ENOMEM; 124 memcpy(modes, modes_bios, size); 125 126 regs->e.eax = VESA_GET_CUR_MODE; 127 BE_int86(0x10, regs, regs); 128 if (regs->e.eax != 0x4f) { 129 debug("VESA_GET_CUR_MODE: error %x\n", regs->e.eax); 130 return -ENOSYS; 131 } 132 debug("Current mode %x\n", regs->e.ebx); 133 134 for (ptr = modes; *ptr != 0xffff; ptr++) { 135 int mode = le16_to_cpu(*ptr); 136 bool linear_ok; 137 int attr; 138 139 break; 140 debug("Mode %x: ", mode); 141 memset(buffer, '\0', sizeof(struct vbe_mode_info)); 142 regs->e.eax = VESA_GET_MODE_INFO; 143 regs->e.ebx = 0; 144 regs->e.ecx = mode; 145 regs->e.edx = 0; 146 regs->e.esi = buffer_seg; 147 regs->e.edi = buffer_adr; 148 BE_int86(0x10, regs, regs); 149 if (regs->e.eax != 0x4f) { 150 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); 151 continue; 152 } 153 memcpy(mode_info->mode_info_block, buffer, 154 sizeof(struct vesa_mode_info)); 155 mode_info->valid = true; 156 vm = &mode_info->vesa; 157 attr = le16_to_cpu(vm->mode_attributes); 158 linear_ok = attr & 0x80; 159 debug("res %d x %d, %d bpp, mm %d, (Linear %s, attr %02x)\n", 160 le16_to_cpu(vm->x_resolution), 161 le16_to_cpu(vm->y_resolution), 162 vm->bits_per_pixel, vm->memory_model, 163 linear_ok ? "OK" : "not available", 164 attr); 165 debug("\tRGB pos=%d,%d,%d, size=%d,%d,%d\n", 166 vm->red_mask_pos, vm->green_mask_pos, vm->blue_mask_pos, 167 vm->red_mask_size, vm->green_mask_size, 168 vm->blue_mask_size); 169 } 170 171 return 0; 172 } 173 174 static int atibios_set_vesa_mode(RMREGS *regs, int vesa_mode, 175 struct vbe_mode_info *mode_info) 176 { 177 void *buffer = (void *)(M.mem_base + vbe_offset); 178 u16 buffer_seg = (((unsigned long)vbe_offset) >> 4) & 0xff00; 179 u16 buffer_adr = ((unsigned long)vbe_offset) & 0xffff; 180 struct vesa_mode_info *vm; 181 182 debug("VBE: Setting VESA mode %#04x\n", vesa_mode); 183 regs->e.eax = VESA_SET_MODE; 184 regs->e.ebx = vesa_mode; 185 /* request linear framebuffer mode and don't clear display */ 186 regs->e.ebx |= (1 << 14) | (1 << 15); 187 BE_int86(0x10, regs, regs); 188 if (regs->e.eax != 0x4f) { 189 debug("VESA_SET_MODE: error %x\n", regs->e.eax); 190 return -ENOSYS; 191 } 192 193 memset(buffer, '\0', sizeof(struct vbe_mode_info)); 194 debug("VBE: Geting info for VESA mode %#04x\n", vesa_mode); 195 regs->e.eax = VESA_GET_MODE_INFO; 196 regs->e.ecx = vesa_mode; 197 regs->e.esi = buffer_seg; 198 regs->e.edi = buffer_adr; 199 BE_int86(0x10, regs, regs); 200 if (regs->e.eax != 0x4f) { 201 debug("VESA_GET_MODE_INFO: error %x\n", regs->e.eax); 202 return -ENOSYS; 203 } 204 205 memcpy(mode_info->mode_info_block, buffer, 206 sizeof(struct vesa_mode_info)); 207 mode_info->valid = true; 208 mode_info->video_mode = vesa_mode; 209 vm = &mode_info->vesa; 210 vm->x_resolution = le16_to_cpu(vm->x_resolution); 211 vm->y_resolution = le16_to_cpu(vm->y_resolution); 212 vm->bytes_per_scanline = le16_to_cpu(vm->bytes_per_scanline); 213 vm->phys_base_ptr = le32_to_cpu(vm->phys_base_ptr); 214 vm->mode_attributes = le16_to_cpu(vm->mode_attributes); 215 debug("VBE: Init complete\n"); 216 217 return 0; 218 } 219 #endif /* CONFIG_FRAMEBUFFER_SET_VESA_MODE */ 220 221 /**************************************************************************** 222 PARAMETERS: 223 pcidev - PCI device info for the video card on the bus to boot 224 vga_info - BIOS emulator VGA info structure 225 226 REMARKS: 227 This function executes the BIOS POST code on the controller. We assume that 228 at this stage the controller has its I/O and memory space enabled and 229 that all other controllers are in a disabled state. 230 ****************************************************************************/ 231 #ifdef CONFIG_DM_PCI 232 static void PCI_doBIOSPOST(struct udevice *pcidev, BE_VGAInfo *vga_info, 233 int vesa_mode, struct vbe_mode_info *mode_info) 234 #else 235 static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo *vga_info, 236 int vesa_mode, struct vbe_mode_info *mode_info) 237 #endif 238 { 239 RMREGS regs; 240 RMSREGS sregs; 241 #ifdef CONFIG_DM_PCI 242 pci_dev_t bdf; 243 #endif 244 245 /* Determine the value to store in AX for BIOS POST. Per the PCI specs, 246 AH must contain the bus and AL must contain the devfn, encoded as 247 (dev << 3) | fn 248 */ 249 memset(®s, 0, sizeof(regs)); 250 memset(&sregs, 0, sizeof(sregs)); 251 #ifdef CONFIG_DM_PCI 252 bdf = dm_pci_get_bdf(pcidev); 253 regs.x.ax = (int)PCI_BUS(bdf) << 8 | 254 (int)PCI_DEV(bdf) << 3 | (int)PCI_FUNC(bdf); 255 #else 256 regs.x.ax = ((int)PCI_BUS(pcidev) << 8) | 257 ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev); 258 #endif 259 /*Setup the X86 emulator for the VGA BIOS*/ 260 BE_setVGA(vga_info); 261 262 /*Execute the BIOS POST code*/ 263 BE_callRealMode(0xC000, 0x0003, ®s, &sregs); 264 265 /*Cleanup and exit*/ 266 BE_getVGA(vga_info); 267 268 #ifdef CONFIG_FRAMEBUFFER_SET_VESA_MODE 269 /* Useful for debugging */ 270 if (0) 271 atibios_debug_mode(vga_info, ®s, vesa_mode, mode_info); 272 if (vesa_mode != -1) 273 atibios_set_vesa_mode(®s, vesa_mode, mode_info); 274 #endif 275 } 276 277 /**************************************************************************** 278 PARAMETERS: 279 pcidev - PCI device info for the video card on the bus 280 bar - Place to return the base address register offset to use 281 282 RETURNS: 283 The address to use to map the secondary BIOS (AGP devices) 284 285 REMARKS: 286 Searches all the PCI base address registers for the device looking for a 287 memory mapping that is large enough to hold our ROM BIOS. We usually end up 288 finding the framebuffer mapping (usually BAR 0x10), and we use this mapping 289 to map the BIOS for the device into. We use a mapping that is already 290 assigned to the device to ensure the memory range will be passed through 291 by any PCI->PCI or AGP->PCI bridge that may be present. 292 293 NOTE: Usually this function is only used for AGP devices, but it may be 294 used for PCI devices that have already been POST'ed and the BIOS 295 ROM base address has been zero'ed out. 296 297 NOTE: This function leaves the original memory aperture disabled by leaving 298 it programmed to all 1's. It must be restored to the correct value 299 later. 300 ****************************************************************************/ 301 #ifdef CONFIG_DM_PCI 302 static u32 PCI_findBIOSAddr(struct udevice *pcidev, int *bar) 303 #else 304 static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar) 305 #endif 306 { 307 u32 base, size; 308 309 for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) { 310 #ifdef CONFIG_DM_PCI 311 dm_pci_read_config32(pcidev, *bar, &base); 312 #else 313 pci_read_config_dword(pcidev, *bar, &base); 314 #endif 315 if (!(base & 0x1)) { 316 #ifdef CONFIG_DM_PCI 317 dm_pci_write_config32(pcidev, *bar, 0xFFFFFFFF); 318 dm_pci_read_config32(pcidev, *bar, &size); 319 #else 320 pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF); 321 pci_read_config_dword(pcidev, *bar, &size); 322 #endif 323 size = ~(size & ~0xFF) + 1; 324 if (size >= MAX_BIOSLEN) 325 return base & ~0xFF; 326 } 327 } 328 return 0; 329 } 330 331 /**************************************************************************** 332 REMARKS: 333 Some non-x86 Linux kernels map PCI relocateable I/O to values that 334 are above 64K, which will not work with the BIOS image that requires 335 the offset for the I/O ports to be a maximum of 16-bits. Ideally 336 someone should fix the kernel to map the I/O ports for VGA compatible 337 devices to a different location (or just all I/O ports since it is 338 unlikely you can have enough devices in the machine to use up all 339 64K of the I/O space - a total of more than 256 cards would be 340 necessary). 341 342 Anyway to fix this we change all I/O mapped base registers and 343 chop off the top bits. 344 ****************************************************************************/ 345 #ifdef CONFIG_DM_PCI 346 static void PCI_fixupIObase(struct udevice *pcidev, int reg, u32 *base) 347 #else 348 static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base) 349 #endif 350 { 351 if ((*base & 0x1) && (*base > 0xFFFE)) { 352 *base &= 0xFFFF; 353 #ifdef CONFIG_DM_PCI 354 dm_pci_write_config32(pcidev, reg, *base); 355 #else 356 pci_write_config_dword(pcidev, reg, *base); 357 #endif 358 359 } 360 } 361 362 /**************************************************************************** 363 PARAMETERS: 364 pcidev - PCI device info for the video card on the bus 365 366 RETURNS: 367 Pointers to the mapped BIOS image 368 369 REMARKS: 370 Maps a pointer to the BIOS image on the graphics card on the PCI bus. 371 ****************************************************************************/ 372 #ifdef CONFIG_DM_PCI 373 void *PCI_mapBIOSImage(struct udevice *pcidev) 374 #else 375 void *PCI_mapBIOSImage(pci_dev_t pcidev) 376 #endif 377 { 378 u32 BIOSImageBus; 379 int BIOSImageBAR; 380 u8 *BIOSImage; 381 382 /*Save PCI BAR registers that might get changed*/ 383 #ifdef CONFIG_DM_PCI 384 dm_pci_read_config32(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); 385 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); 386 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); 387 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); 388 dm_pci_read_config32(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); 389 #else 390 pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress); 391 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10); 392 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); 393 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18); 394 pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); 395 #endif 396 397 /*Fix up I/O base registers to less than 64K */ 398 if(saveBaseAddress14 != 0) 399 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14); 400 else 401 PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20); 402 403 /* Some cards have problems that stop us from being able to read the 404 BIOS image from the ROM BAR. To fix this we have to do some chipset 405 specific programming for different cards to solve this problem. 406 */ 407 408 BIOSImageBus = PCI_findBIOSAddr(pcidev, &BIOSImageBAR); 409 if (BIOSImageBus == 0) { 410 printf("Find bios addr error\n"); 411 return NULL; 412 } 413 414 #ifdef CONFIG_DM_PCI 415 BIOSImage = dm_pci_bus_to_virt(pcidev, BIOSImageBus, 416 PCI_REGION_MEM, 0, MAP_NOCACHE); 417 418 /*Change the PCI BAR registers to map it onto the bus.*/ 419 dm_pci_write_config32(pcidev, BIOSImageBAR, 0); 420 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1); 421 #else 422 BIOSImage = pci_bus_to_virt(pcidev, BIOSImageBus, 423 PCI_REGION_MEM, 0, MAP_NOCACHE); 424 425 /*Change the PCI BAR registers to map it onto the bus.*/ 426 pci_write_config_dword(pcidev, BIOSImageBAR, 0); 427 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImageBus | 0x1); 428 #endif 429 udelay(1); 430 431 /*Check that the BIOS image is valid. If not fail, or return the 432 compiled in BIOS image if that option was enabled 433 */ 434 if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) { 435 return NULL; 436 } 437 438 return BIOSImage; 439 } 440 441 /**************************************************************************** 442 PARAMETERS: 443 pcidev - PCI device info for the video card on the bus 444 445 REMARKS: 446 Unmaps the BIOS image for the device and restores framebuffer mappings 447 ****************************************************************************/ 448 #ifdef CONFIG_DM_PCI 449 void PCI_unmapBIOSImage(struct udevice *pcidev, void *BIOSImage) 450 { 451 dm_pci_write_config32(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress); 452 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); 453 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); 454 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18); 455 dm_pci_write_config32(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20); 456 } 457 #else 458 void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage) 459 { 460 pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress); 461 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10); 462 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14); 463 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18); 464 pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20); 465 } 466 #endif 467 468 /**************************************************************************** 469 PARAMETERS: 470 pcidev - PCI device info for the video card on the bus to boot 471 VGAInfo - BIOS emulator VGA info structure 472 473 RETURNS: 474 true if successfully initialised, false if not. 475 476 REMARKS: 477 Loads and POST's the display controllers BIOS, directly from the BIOS 478 image we can extract over the PCI bus. 479 ****************************************************************************/ 480 #ifdef CONFIG_DM_PCI 481 static int PCI_postController(struct udevice *pcidev, uchar *bios_rom, 482 int bios_len, BE_VGAInfo *vga_info, 483 int vesa_mode, struct vbe_mode_info *mode_info) 484 #else 485 static int PCI_postController(pci_dev_t pcidev, uchar *bios_rom, int bios_len, 486 BE_VGAInfo *vga_info, int vesa_mode, 487 struct vbe_mode_info *mode_info) 488 #endif 489 { 490 u32 bios_image_len; 491 uchar *mapped_bios; 492 uchar *copy_of_bios; 493 #ifdef CONFIG_DM_PCI 494 pci_dev_t bdf; 495 #endif 496 497 if (bios_rom) { 498 copy_of_bios = bios_rom; 499 bios_image_len = bios_len; 500 } else { 501 /* 502 * Allocate memory to store copy of BIOS from display 503 * controller 504 */ 505 mapped_bios = PCI_mapBIOSImage(pcidev); 506 if (mapped_bios == NULL) { 507 printf("videoboot: Video ROM failed to map!\n"); 508 return false; 509 } 510 511 bios_image_len = mapped_bios[2] * 512; 512 513 copy_of_bios = malloc(bios_image_len); 514 if (copy_of_bios == NULL) { 515 printf("videoboot: Out of memory!\n"); 516 return false; 517 } 518 memcpy(copy_of_bios, mapped_bios, bios_image_len); 519 PCI_unmapBIOSImage(pcidev, mapped_bios); 520 } 521 522 /*Save information in vga_info structure*/ 523 #ifdef CONFIG_DM_PCI 524 bdf = dm_pci_get_bdf(pcidev); 525 vga_info->function = PCI_FUNC(bdf); 526 vga_info->device = PCI_DEV(bdf); 527 vga_info->bus = PCI_BUS(bdf); 528 #else 529 vga_info->function = PCI_FUNC(pcidev); 530 vga_info->device = PCI_DEV(pcidev); 531 vga_info->bus = PCI_BUS(pcidev); 532 #endif 533 vga_info->pcidev = pcidev; 534 vga_info->BIOSImage = copy_of_bios; 535 vga_info->BIOSImageLen = bios_image_len; 536 537 /*Now execute the BIOS POST for the device*/ 538 if (copy_of_bios[0] != 0x55 || copy_of_bios[1] != 0xAA) { 539 printf("videoboot: Video ROM image is invalid!\n"); 540 return false; 541 } 542 543 PCI_doBIOSPOST(pcidev, vga_info, vesa_mode, mode_info); 544 545 /*Reset the size of the BIOS image to the final size*/ 546 vga_info->BIOSImageLen = copy_of_bios[2] * 512; 547 return true; 548 } 549 550 #ifdef CONFIG_DM_PCI 551 int biosemu_setup(struct udevice *pcidev, BE_VGAInfo **vga_infop) 552 #else 553 int biosemu_setup(pci_dev_t pcidev, BE_VGAInfo **vga_infop) 554 #endif 555 { 556 BE_VGAInfo *VGAInfo; 557 #ifdef CONFIG_DM_PCI 558 pci_dev_t bdf = dm_pci_get_bdf(pcidev); 559 560 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n", 561 PCI_BUS(bdf), PCI_FUNC(bdf), PCI_DEV(bdf)); 562 #else 563 printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n", 564 PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev)); 565 #endif 566 /*Initialise the x86 BIOS emulator*/ 567 if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) { 568 printf("videoboot: Out of memory!\n"); 569 return -ENOMEM; 570 } 571 memset(VGAInfo, 0, sizeof(*VGAInfo)); 572 BE_init(0, 65536, VGAInfo, 0); 573 *vga_infop = VGAInfo; 574 575 return 0; 576 } 577 578 void biosemu_set_interrupt_handler(int intnum, int (*int_func)(void)) 579 { 580 X86EMU_setupIntrFunc(intnum, (X86EMU_intrFuncs)int_func); 581 } 582 583 #ifdef CONFIG_DM_PCI 584 int biosemu_run(struct udevice *pcidev, uchar *bios_rom, int bios_len, 585 BE_VGAInfo *vga_info, int clean_up, int vesa_mode, 586 struct vbe_mode_info *mode_info) 587 #else 588 int biosemu_run(pci_dev_t pcidev, uchar *bios_rom, int bios_len, 589 BE_VGAInfo *vga_info, int clean_up, int vesa_mode, 590 struct vbe_mode_info *mode_info) 591 #endif 592 { 593 /*Post all the display controller BIOS'es*/ 594 if (!PCI_postController(pcidev, bios_rom, bios_len, vga_info, 595 vesa_mode, mode_info)) 596 return -EINVAL; 597 598 /* 599 * Cleanup and exit the emulator if requested. If the BIOS emulator 600 * is needed after booting the card, we will not call BE_exit and 601 * leave it enabled for further use (ie: VESA driver etc). 602 */ 603 if (clean_up) { 604 BE_exit(); 605 if (vga_info->BIOSImage && 606 (ulong)(vga_info->BIOSImage) != 0xc0000) 607 free(vga_info->BIOSImage); 608 free(vga_info); 609 } 610 611 return 0; 612 } 613 614 /**************************************************************************** 615 PARAMETERS: 616 pcidev - PCI device info for the video card on the bus to boot 617 pVGAInfo - Place to return VGA info structure is requested 618 cleanUp - true to clean up on exit, false to leave emulator active 619 620 REMARKS: 621 Boots the PCI/AGP video card on the bus using the Video ROM BIOS image 622 and the X86 BIOS emulator module. 623 ****************************************************************************/ 624 #ifdef CONFIG_DM_PCI 625 int BootVideoCardBIOS(struct udevice *pcidev, BE_VGAInfo **pVGAInfo, 626 int clean_up) 627 #else 628 int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo **pVGAInfo, int clean_up) 629 #endif 630 { 631 BE_VGAInfo *VGAInfo; 632 int ret; 633 634 ret = biosemu_setup(pcidev, &VGAInfo); 635 if (ret) 636 return false; 637 ret = biosemu_run(pcidev, NULL, 0, VGAInfo, clean_up, -1, NULL); 638 if (ret) 639 return false; 640 641 /* Return VGA info pointer if the caller requested it*/ 642 if (pVGAInfo) 643 *pVGAInfo = VGAInfo; 644 645 return true; 646 } 647