1*a63e54abSMario Sixmenuconfig AXI 2*a63e54abSMario Six bool "AXI bus drivers" 3*a63e54abSMario Six help 4*a63e54abSMario Six Support AXI (Advanced eXtensible Interface) busses, a on-chip 5*a63e54abSMario Six interconnect specification for managing functional blocks in SoC 6*a63e54abSMario Six designs, which is also often used in designs involving FPGAs (e.g. 7*a63e54abSMario Six communication with IP cores in Xilinx FPGAs). 8*a63e54abSMario Six 9*a63e54abSMario Six These types of busses expose a virtual address space that can be 10*a63e54abSMario Six accessed using different address widths (8, 16, and 32 are supported 11*a63e54abSMario Six for now). 12*a63e54abSMario Six 13*a63e54abSMario Six Other similar bus architectures may be compatible as well. 14