1Armada-8K PCIe DT details:
2==========================
3
4Armada-8k uses synopsis designware PCIe controller.
5
6Required properties:
7- compatible : should be "marvell,armada8k-pcie", "snps,dw-pcie".
8- reg: base addresses and lengths of the pcie control and global control registers.
9 "ctrl" registers points to the global control registers, while the "config" space
10 points to the pcie configuration registers as mentioned in dw-pcie dt bindings in the link below.
11- interrupt-map-mask and interrupt-map, standard PCI properties to
12  define the mapping of the PCIe interface to interrupt numbers.
13- All other definitions as per generic PCI bindings
14See Linux kernel documentation:
15"Documentation/devicetree/bindings/pci/designware-pcie.txt"
16
17Optional properties:
18PHY support is still not supported for armada-8k, once it will, the following parameters can be used:
19- phys		    : phandle to phy node associated with pcie controller.
20- phy-names	    : must be "pcie-phy"
21- marvell,reset-gpio :  specifies a gpio that needs to be activated for plug-in
22			card reset signal release.
23Example:
24
25cpm_pcie0: pcie@f2600000 {
26	compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
27	reg = <0 0xf2600000 0 0x10000>,
28	      <0 0xf6f00000 0 0x80000>;
29	reg-names = "ctrl", "config";
30	#address-cells = <3>;
31	#size-cells = <2>;
32	#interrupt-cells = <1>;
33	device_type = "pci";
34	dma-coherent;
35
36	bus-range = <0 0xff>;
37	ranges =
38		/* downstream I/O */
39		<0x81000000 0 0xf9000000 0  0xf9000000 0 0x10000
40		/* non-prefetchable memory */
41		0x82000000 0 0xf6000000 0  0xf6000000 0 0xf00000>;
42	interrupt-map-mask = <0 0 0 0>;
43	interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
44	interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
45	num-lanes = <1>;
46	clocks = <&cpm_syscon0 1 13>;
47	marvell,reset-gpio = <&cpm_gpio1 20 GPIO_ACTIVE_HIGH>;
48	status = "disabled";
49};
50