1*7b9cf840SSimon Glass* Allwinner A10 MDIO Ethernet Controller interface
2*7b9cf840SSimon Glass
3*7b9cf840SSimon GlassRequired properties:
4*7b9cf840SSimon Glass- compatible: should be "allwinner,sun4i-a10-mdio"
5*7b9cf840SSimon Glass              (Deprecated: "allwinner,sun4i-mdio").
6*7b9cf840SSimon Glass- reg: address and length of the register set for the device.
7*7b9cf840SSimon Glass
8*7b9cf840SSimon GlassOptional properties:
9*7b9cf840SSimon Glass- phy-supply: phandle to a regulator if the PHY needs one
10*7b9cf840SSimon Glass
11*7b9cf840SSimon GlassExample at the SoC level:
12*7b9cf840SSimon Glassmdio@01c0b080 {
13*7b9cf840SSimon Glass	compatible = "allwinner,sun4i-a10-mdio";
14*7b9cf840SSimon Glass	reg = <0x01c0b080 0x14>;
15*7b9cf840SSimon Glass	#address-cells = <1>;
16*7b9cf840SSimon Glass	#size-cells = <0>;
17*7b9cf840SSimon Glass};
18*7b9cf840SSimon Glass
19*7b9cf840SSimon GlassAnd at the board level:
20*7b9cf840SSimon Glass
21*7b9cf840SSimon Glassmdio@01c0b080 {
22*7b9cf840SSimon Glass	phy-supply = <&reg_emac_3v3>;
23*7b9cf840SSimon Glass
24*7b9cf840SSimon Glass	phy0: ethernet-phy@0 {
25*7b9cf840SSimon Glass		reg = <0>;
26*7b9cf840SSimon Glass	};
27*7b9cf840SSimon Glass};
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