1Intel Bay Trail FSP UPD Binding
2===============================
3
4The device tree node which describes the overriding of the Intel Bay Trail FSP
5UPD data for configuring the SoC.
6
7All properties can be found within the `upd-region` struct in
8arch/x86/include/asm/arch-baytrail/fsp/fsp_vpd.h, under the same names, and in
9Intel's FSP Binary Configuration Tool for Bay Trail.  This list of properties
10is matched up to Intel's E3800 FSPv4 release.
11
12# Boolean properties:
13
14- fsp,enable-sdio
15- fsp,enable-sdcard
16- fsp,enable-hsuart0
17- fsp,enable-hsuart1
18- fsp,enable-spi
19- fsp,enable-sata
20- fsp,enable-azalia
21- fsp,enable-xhci
22- fsp,enable-dma0
23- fsp,enable-dma1
24- fsp,enable-i2-c0
25- fsp,enable-i2-c1
26- fsp,enable-i2-c2
27- fsp,enable-i2-c3
28- fsp,enable-i2-c4
29- fsp,enable-i2-c5
30- fsp,enable-i2-c6
31- fsp,enable-pwm0
32- fsp,enable-pwm1
33- fsp,enable-hsi
34- fsp,mrc-debug-msg
35- fsp,isp-enable
36- fsp,igd-render-standby
37- fsp,txe-uma-enable
38- fsp,emmc45-ddr50-enabled
39- fsp,emmc45-hs200-enabled
40- fsp,enable-igd
41- fsp,enable-memory-down
42
43If you set "fsp,enable-memory-down" you are strongly encouraged to provide an
44"fsp,memory-down-params{};" to specify how your memory is configured.  If you
45do not set "fsp,enable-memory-down", then the DIMM SPD information will be
46discovered by the FSP and used to setup main memory.
47
48
49# Integer properties:
50
51- fsp,mrc-init-tseg-size
52- fsp,mrc-init-mmio-size
53- fsp,mrc-init-spd-addr1
54- fsp,mrc-init-spd-addr2
55- fsp,emmc-boot-mode
56- fsp,sata-mode
57- fsp,lpe-mode
58- fsp,lpss-sio-mode
59- fsp,igd-dvmt50-pre-alloc
60- fsp,aperture-size
61- fsp,gtt-size
62- fsp,scc-mode
63- fsp,os-selection
64- fsp,emmc45-retune-timer-value
65
66- fsp,memory-down-params {
67
68	# Boolean properties:
69
70	- fsp,dimm-0-enable
71	- fsp,dimm-1-enable
72
73	# Integer properties:
74
75	- fsp,dram-speed
76	- fsp,dram-type
77	- fsp,dimm-width
78	- fsp,dimm-density
79	- fsp,dimm-bus-width
80	- fsp,dimm-sides
81	- fsp,dimm-tcl
82	- fsp,dimm-trpt-rcd
83	- fsp,dimm-twr
84	- fsp,dimm-twtr
85	- fsp,dimm-trrd
86	- fsp,dimm-trtp
87	- fsp,dimm-tfaw
88};
89
90For all integer properties, available options are listed in fsp_configs.h in
91arch/x86/include/asm/arch-baytrail/fsp directory (eg: MRC_INIT_TSEG_SIZE_1MB).
92
93
94Example (from MinnowMax Dual Core):
95-----------------------------------
96
97/ {
98	...
99
100	fsp {
101		compatible = "intel,baytrail-fsp";
102		fsp,mrc-init-tseg-size = <MRC_INIT_TSEG_SIZE_1MB>;
103		fsp,mrc-init-mmio-size = <MRC_INIT_MMIO_SIZE_2048MB>;
104		fsp,mrc-init-spd-addr1 = <0xa0>;
105		fsp,mrc-init-spd-addr2 = <0xa2>;
106		fsp,emmc-boot-mode = <EMMC_BOOT_MODE_AUTO>;
107		fsp,enable-sdio;
108		fsp,enable-sdcard;
109		fsp,enable-hsuart1;
110		fsp,enable-spi;
111		fsp,enable-sata;
112		fsp,sata-mode = <SATA_MODE_AHCI>;
113		fsp,lpe-mode = <LPE_MODE_PCI>;
114		fsp,lpss-sio-mode = <LPSS_SIO_MODE_PCI>;
115		fsp,enable-dma0;
116		fsp,enable-dma1;
117		fsp,enable-i2c0;
118		fsp,enable-i2c1;
119		fsp,enable-i2c2;
120		fsp,enable-i2c3;
121		fsp,enable-i2c4;
122		fsp,enable-i2c5;
123		fsp,enable-i2c6;
124		fsp,enable-pwm0;
125		fsp,enable-pwm1;
126		fsp,igd-dvmt50-pre-alloc = <IGD_DVMT50_PRE_ALLOC_64MB>;
127		fsp,aperture-size = <APERTURE_SIZE_256MB>;
128		fsp,gtt-size = <GTT_SIZE_2MB>;
129		fsp,scc-mode = <SCC_MODE_PCI>;
130		fsp,os-selection = <OS_SELECTION_LINUX>;
131		fsp,emmc45-ddr50-enabled;
132		fsp,emmc45-retune-timer-value = <8>;
133		fsp,enable-igd;
134		fsp,enable-memory-down;
135		fsp,memory-down-params {
136			compatible = "intel,baytrail-fsp-mdp";
137			fsp,dram-speed = <DRAM_SPEED_1066MTS>;
138			fsp,dram-type = <DRAM_TYPE_DDR3L>;
139			fsp,dimm-0-enable;
140			fsp,dimm-width = <DIMM_WIDTH_X16>;
141			fsp,dimm-density = <DIMM_DENSITY_4GBIT>;
142			fsp,dimm-bus-width = <DIMM_BUS_WIDTH_64BITS>;
143			fsp,dimm-sides = <DIMM_SIDES_1RANKS>;
144			fsp,dimm-tcl = <0xb>;
145			fsp,dimm-trpt-rcd = <0xb>;
146			fsp,dimm-twr = <0xc>;
147			fsp,dimm-twtr = <6>;
148			fsp,dimm-trrd = <6>;
149			fsp,dimm-trtp = <6>;
150			fsp,dimm-tfaw = <0x14>;
151		};
152	};
153
154	...
155};
156