1*4fadcaf0SPatrice Chotard* I2C controller embedded in STMicroelectronis STM32 platforms 2*4fadcaf0SPatrice Chotard 3*4fadcaf0SPatrice ChotardRequired properties : 4*4fadcaf0SPatrice Chotard- compatible : Must be "st,stm32f7-i2c" 5*4fadcaf0SPatrice Chotard- reg : Offset and length of the register set for the device 6*4fadcaf0SPatrice Chotard- resets: Must contain the phandle to the reset controller 7*4fadcaf0SPatrice Chotard- clocks: Must contain the input clock of the I2C instance 8*4fadcaf0SPatrice Chotard- A pinctrl state named "default" must be defined to set pins in mode of 9*4fadcaf0SPatrice Chotard operation for I2C transfer 10*4fadcaf0SPatrice Chotard- #address-cells = <1>; 11*4fadcaf0SPatrice Chotard- #size-cells = <0>; 12*4fadcaf0SPatrice Chotard 13*4fadcaf0SPatrice ChotardOptional properties : 14*4fadcaf0SPatrice Chotard- clock-frequency : Desired I2C bus clock frequency in Hz. If not specified, 15*4fadcaf0SPatrice Chotard the default 100 kHz frequency will be used. As only Normal, Fast and Fast+ 16*4fadcaf0SPatrice Chotard modes are implemented, possible values are 100000, 400000 and 1000000. 17*4fadcaf0SPatrice Chotard 18*4fadcaf0SPatrice ChotardExample : 19*4fadcaf0SPatrice Chotard 20*4fadcaf0SPatrice Chotard i2c1: i2c@40005400 { 21*4fadcaf0SPatrice Chotard compatible = "st,stm32f7-i2c"; 22*4fadcaf0SPatrice Chotard reg = <0x40005400 0x400>; 23*4fadcaf0SPatrice Chotard resets = <&rcc 181>; 24*4fadcaf0SPatrice Chotard clocks = <&clk_pclk1>; 25*4fadcaf0SPatrice Chotard pinctrl-names = "default"; 26*4fadcaf0SPatrice Chotard pinctrl-0 = <&pinctrl_i2c1>; 27*4fadcaf0SPatrice Chotard clock-frequency = <400000>; 28*4fadcaf0SPatrice Chotard #address-cells = <1>; 29*4fadcaf0SPatrice Chotard #size-cells = <0>; 30*4fadcaf0SPatrice Chotard }; 31