1*3d1957f0SSimon GlassCommon i2c bus multiplexer/switch properties. 2*3d1957f0SSimon Glass 3*3d1957f0SSimon GlassAn i2c bus multiplexer/switch will have several child busses that are 4*3d1957f0SSimon Glassnumbered uniquely in a device dependent manner. The nodes for an i2c bus 5*3d1957f0SSimon Glassmultiplexer/switch will have one child node for each child 6*3d1957f0SSimon Glassbus. 7*3d1957f0SSimon Glass 8*3d1957f0SSimon GlassRequired properties: 9*3d1957f0SSimon Glass- #address-cells = <1>; 10*3d1957f0SSimon Glass- #size-cells = <0>; 11*3d1957f0SSimon Glass 12*3d1957f0SSimon GlassRequired properties for child nodes: 13*3d1957f0SSimon Glass- #address-cells = <1>; 14*3d1957f0SSimon Glass- #size-cells = <0>; 15*3d1957f0SSimon Glass- reg : The sub-bus number. 16*3d1957f0SSimon Glass 17*3d1957f0SSimon GlassOptional properties for child nodes: 18*3d1957f0SSimon Glass- Other properties specific to the multiplexer/switch hardware. 19*3d1957f0SSimon Glass- Child nodes conforming to i2c bus binding 20*3d1957f0SSimon Glass 21*3d1957f0SSimon Glass 22*3d1957f0SSimon GlassExample : 23*3d1957f0SSimon Glass 24*3d1957f0SSimon Glass /* 25*3d1957f0SSimon Glass An NXP pca9548 8 channel I2C multiplexer at address 0x70 26*3d1957f0SSimon Glass with two NXP pca8574 GPIO expanders attached, one each to 27*3d1957f0SSimon Glass ports 3 and 4. 28*3d1957f0SSimon Glass */ 29*3d1957f0SSimon Glass 30*3d1957f0SSimon Glass mux@70 { 31*3d1957f0SSimon Glass compatible = "nxp,pca9548"; 32*3d1957f0SSimon Glass reg = <0x70>; 33*3d1957f0SSimon Glass #address-cells = <1>; 34*3d1957f0SSimon Glass #size-cells = <0>; 35*3d1957f0SSimon Glass 36*3d1957f0SSimon Glass i2c@3 { 37*3d1957f0SSimon Glass #address-cells = <1>; 38*3d1957f0SSimon Glass #size-cells = <0>; 39*3d1957f0SSimon Glass reg = <3>; 40*3d1957f0SSimon Glass 41*3d1957f0SSimon Glass gpio1: gpio@38 { 42*3d1957f0SSimon Glass compatible = "nxp,pca8574"; 43*3d1957f0SSimon Glass reg = <0x38>; 44*3d1957f0SSimon Glass #gpio-cells = <2>; 45*3d1957f0SSimon Glass gpio-controller; 46*3d1957f0SSimon Glass }; 47*3d1957f0SSimon Glass }; 48*3d1957f0SSimon Glass i2c@4 { 49*3d1957f0SSimon Glass #address-cells = <1>; 50*3d1957f0SSimon Glass #size-cells = <0>; 51*3d1957f0SSimon Glass reg = <4>; 52*3d1957f0SSimon Glass 53*3d1957f0SSimon Glass gpio2: gpio@38 { 54*3d1957f0SSimon Glass compatible = "nxp,pca8574"; 55*3d1957f0SSimon Glass reg = <0x38>; 56*3d1957f0SSimon Glass #gpio-cells = <2>; 57*3d1957f0SSimon Glass gpio-controller; 58*3d1957f0SSimon Glass }; 59*3d1957f0SSimon Glass }; 60*3d1957f0SSimon Glass }; 61