1Microsemi Corporation (MSCC) Serial GPIO driver
2
3The MSCC serial GPIO extends the number or GPIO's on the system by
4means of 4 dedicated pins: one input, one output, one clock and one
5strobe pin. By attaching a number of (external) shift registers, the
6effective GPIO count can be extended by up to 128 GPIO's per
7controller.
8
9Required properties:
10- compatible : "mscc,luton-sgpio" or "mscc,ocelot-sgpio"
11- clock: Reference clock used to generate clock divider setting. See
12  mscc,sgpio-frequency property.
13- reg : Physical base address and length of the controller's registers.
14- #gpio-cells : Should be two. The first cell is the pin number and the
15  second cell is used to specify optional parameters:
16  - bit 0 specifies polarity (0 for normal, 1 for inverted)
17- gpio-controller : Marks the device node as a GPIO controller.
18- gpio-ranges: Standard gpio range(s): phandle, gpio base, pinctrl base
19  and count.
20
21Optional properties:
22- ngpios: See gpio.txt
23- mscc,sgpio-frequency: The frequency at which the serial bitstream is
24  generated and sampled. Default: 12500000 (Hz).
25- mscc,sgpio-ports: A bitmask (32 bits) of which ports are enabled in
26  the serialized gpio stream. One 'port' will transport from 1 to 4
27  gpio bits. Default: 0xFFFFFFFF.
28
29Typically the pinctrl-0 and pinctrl-names properties will also be
30present to enable the use of the SIO CLK, LD, DI and DO for some
31regular GPIO pins.
32
33Example:
34
35sgpio: gpio@10700f8 {
36       compatible = "mscc,ocelot-sgpio";
37       pinctrl-0 = <&sgpio_pins>;
38       pinctrl-names = "default";
39       reg = <0x10700f8 0x100>;
40       gpio-controller;
41       #gpio-cells = <2>;
42       gpio-ranges = <&sgpio 0 0 64>;
43       mscc,sgpio-frequency = <12500>;
44       mscc,sgpio-ports = <0x000FFFFF>;
45};
46