1Specifying GPIO information for devices 2============================================ 3 41) gpios property 5----------------- 6 7Nodes that makes use of GPIOs should specify them using one or more 8properties, each containing a 'gpio-list': 9 10 gpio-list ::= <single-gpio> [gpio-list] 11 single-gpio ::= <gpio-phandle> <gpio-specifier> 12 gpio-phandle : phandle to gpio controller node 13 gpio-specifier : Array of #gpio-cells specifying specific gpio 14 (controller specific) 15 16GPIO properties should be named "[<name>-]gpios", with <name> being the purpose 17of this GPIO for the device. While a non-existent <name> is considered valid 18for compatibility reasons (resolving to the "gpios" property), it is not allowed 19for new bindings. 20 21GPIO properties can contain one or more GPIO phandles, but only in exceptional 22cases should they contain more than one. If your device uses several GPIOs with 23distinct functions, reference each of them under its own property, giving it a 24meaningful name. The only case where an array of GPIOs is accepted is when 25several GPIOs serve the same function (e.g. a parallel data line). 26 27The exact purpose of each gpios property must be documented in the device tree 28binding of the device. 29 30The following example could be used to describe GPIO pins used as device enable 31and bit-banged data signals: 32 33 gpio1: gpio1 { 34 gpio-controller 35 #gpio-cells = <2>; 36 }; 37 gpio2: gpio2 { 38 gpio-controller 39 #gpio-cells = <1>; 40 }; 41 [...] 42 43 enable-gpios = <&gpio2 2>; 44 data-gpios = <&gpio1 12 0>, 45 <&gpio1 13 0>, 46 <&gpio1 14 0>, 47 <&gpio1 15 0>; 48 49Note that gpio-specifier length is controller dependent. In the 50above example, &gpio1 uses 2 cells to specify a gpio, while &gpio2 51only uses one. 52 53gpio-specifier may encode: bank, pin position inside the bank, 54whether pin is open-drain and whether pin is logically inverted. 55Exact meaning of each specifier cell is controller specific, and must 56be documented in the device tree binding for the device. Use the macros 57defined in include/dt-bindings/gpio/gpio.h whenever possible: 58 59Example of a node using GPIOs: 60 61 node { 62 enable-gpios = <&qe_pio_e 18 GPIO_ACTIVE_HIGH>; 63 }; 64 65GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and encodes 66GPIO pin number, and GPIO flags as accepted by the "qe_pio_e" gpio-controller. 67 681.1) GPIO specifier best practices 69---------------------------------- 70 71A gpio-specifier should contain a flag indicating the GPIO polarity; active- 72high or active-low. If it does, the following best practices should be 73followed: 74 75The gpio-specifier's polarity flag should represent the physical level at the 76GPIO controller that achieves (or represents, for inputs) a logically asserted 77value at the device. The exact definition of logically asserted should be 78defined by the binding for the device. If the board inverts the signal between 79the GPIO controller and the device, then the gpio-specifier will represent the 80opposite physical level than the signal at the device's pin. 81 82When the device's signal polarity is configurable, the binding for the 83device must either: 84 85a) Define a single static polarity for the signal, with the expectation that 86any software using that binding would statically program the device to use 87that signal polarity. 88 89The static choice of polarity may be either: 90 91a1) (Preferred) Dictated by a binding-specific DT property. 92 93or: 94 95a2) Defined statically by the DT binding itself. 96 97In particular, the polarity cannot be derived from the gpio-specifier, since 98that would prevent the DT from separately representing the two orthogonal 99concepts of configurable signal polarity in the device, and possible board- 100level signal inversion. 101 102or: 103 104b) Pick a single option for device signal polarity, and document this choice 105in the binding. The gpio-specifier should represent the polarity of the signal 106(at the GPIO controller) assuming that the device is configured for this 107particular signal polarity choice. If software chooses to program the device 108to generate or receive a signal of the opposite polarity, software will be 109responsible for correctly interpreting (inverting) the GPIO signal at the GPIO 110controller. 111 1122) gpio-controller nodes 113------------------------ 114 115Every GPIO controller node must contain both an empty "gpio-controller" 116property, and a #gpio-cells integer property, which indicates the number of 117cells in a gpio-specifier. 118 119Example of two SOC GPIO banks defined as gpio-controller nodes: 120 121 qe_pio_a: gpio-controller@1400 { 122 compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank"; 123 reg = <0x1400 0x18>; 124 gpio-controller; 125 #gpio-cells = <2>; 126 }; 127 128 qe_pio_e: gpio-controller@1460 { 129 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; 130 reg = <0x1460 0x18>; 131 gpio-controller; 132 #gpio-cells = <2>; 133 }; 134 1352.1) gpio- and pin-controller interaction 136----------------------------------------- 137 138Some or all of the GPIOs provided by a GPIO controller may be routed to pins 139on the package via a pin controller. This allows muxing those pins between 140GPIO and other functions. 141 142It is useful to represent which GPIOs correspond to which pins on which pin 143controllers. The gpio-ranges property described below represents this, and 144contains information structures as follows: 145 146 gpio-range-list ::= <single-gpio-range> [gpio-range-list] 147 single-gpio-range ::= <numeric-gpio-range> | <named-gpio-range> 148 numeric-gpio-range ::= 149 <pinctrl-phandle> <gpio-base> <pinctrl-base> <count> 150 named-gpio-range ::= <pinctrl-phandle> <gpio-base> '<0 0>' 151 pinctrl-phandle : phandle to pin controller node 152 gpio-base : Base GPIO ID in the GPIO controller 153 pinctrl-base : Base pinctrl pin ID in the pin controller 154 count : The number of GPIOs/pins in this range 155 156The "pin controller node" mentioned above must conform to the bindings 157described in ../pinctrl/pinctrl-bindings.txt. 158 159In case named gpio ranges are used (ranges with both <pinctrl-base> and 160<count> set to 0), the property gpio-ranges-group-names contains one string 161for every single-gpio-range in gpio-ranges: 162 gpiorange-names-list ::= <gpiorange-name> [gpiorange-names-list] 163 gpiorange-name : Name of the pingroup associated to the GPIO range in 164 the respective pin controller. 165 166Elements of gpiorange-names-list corresponding to numeric ranges contain 167the empty string. Elements of gpiorange-names-list corresponding to named 168ranges contain the name of a pin group defined in the respective pin 169controller. The number of pins/GPIOs in the range is the number of pins in 170that pin group. 171 172Previous versions of this binding required all pin controller nodes that 173were referenced by any gpio-ranges property to contain a property named 174#gpio-range-cells with value <3>. This requirement is now deprecated. 175However, that property may still exist in older device trees for 176compatibility reasons, and would still be required even in new device 177trees that need to be compatible with older software. 178 179Example 1: 180 181 qe_pio_e: gpio-controller@1460 { 182 #gpio-cells = <2>; 183 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; 184 reg = <0x1460 0x18>; 185 gpio-controller; 186 gpio-ranges = <&pinctrl1 0 20 10>, <&pinctrl2 10 50 20>; 187 }; 188 189Here, a single GPIO controller has GPIOs 0..9 routed to pin controller 190pinctrl1's pins 20..29, and GPIOs 10..19 routed to pin controller pinctrl2's 191pins 50..59. 192 193Example 2: 194 195 gpio_pio_i: gpio-controller@14B0 { 196 #gpio-cells = <2>; 197 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; 198 reg = <0x1480 0x18>; 199 gpio-controller; 200 gpio-ranges = <&pinctrl1 0 20 10>, 201 <&pinctrl2 10 0 0>, 202 <&pinctrl1 15 0 10>, 203 <&pinctrl2 25 0 0>; 204 gpio-ranges-group-names = "", 205 "foo", 206 "", 207 "bar"; 208 }; 209 210Here, three GPIO ranges are defined wrt. two pin controllers. pinctrl1 GPIO 211ranges are defined using pin numbers whereas the GPIO ranges wrt. pinctrl2 212are named "foo" and "bar". 213 2143) GPIO hog definitions 215----------------------- 216 217The GPIO chip may contain GPIO hog definitions. GPIO hogging is a mechanism 218providing automatic GPIO request and configuration as part of the 219gpio-controller's driver probe function. 220 221Each GPIO hog definition is represented as a child node of the GPIO controller. 222Required properties: 223- gpio-hog: A property specifying that this child node represents a GPIO hog. 224- gpios: Store the GPIO information (id, flags) for the GPIO to 225 affect. 226 227 ! Not yet support more than one gpio ! 228 229Only one of the following properties scanned in the order shown below. 230- input: A property specifying to set the GPIO direction as input. 231- output-low A property specifying to set the GPIO direction as output with 232 the value low. 233- output-high A property specifying to set the GPIO direction as output with 234 the value high. 235 236Optional properties: 237- line-name: The GPIO label name. If not present the node name is used. 238 239Example: 240 241 tca6416@20 { 242 compatible = "ti,tca6416"; 243 reg = <0x20>; 244 #gpio-cells = <2>; 245 gpio-controller; 246 247 env_reset { 248 gpio-hog; 249 input; 250 gpios = <6 GPIO_ACTIVE_LOW>; 251 }; 252 boot_rescue { 253 gpio-hog; 254 input; 255 line-name = "foo-bar-gpio"; 256 gpios = <7 GPIO_ACTIVE_LOW>; 257 }; 258 }; 259 260For the above Example you can than access the gpio in your boardcode 261with: 262 263 struct gpio_desc *desc; 264 int ret; 265 266 ret = gpio_hog_lookup_name("boot_rescue", &desc); 267 if (ret) 268 return; 269 if (dm_gpio_get_value(desc) == 1) 270 printf("\nBooting into Rescue System\n"); 271 else if (dm_gpio_get_value(desc) == 0) 272 printf("\nBoot normal\n"); 273