1*772f8765STien Fong CheeAltera SOCFPGA Arria10 FPGA Manager
2*772f8765STien Fong Chee
3*772f8765STien Fong CheeRequired properties:
4*772f8765STien Fong Chee- compatible : should contain "altr,socfpga-a10-fpga-mgr"
5*772f8765STien Fong Chee- reg        : base address and size for memory mapped io.
6*772f8765STien Fong Chee               - The first index is for FPGA manager register access.
7*772f8765STien Fong Chee               - The second index is for writing FPGA configuration data.
8*772f8765STien Fong Chee- resets     : Phandle and reset specifier for the device's reset.
9*772f8765STien Fong Chee- clocks     : Clocks used by the device.
10*772f8765STien Fong Chee
11*772f8765STien Fong CheeExample:
12*772f8765STien Fong Chee
13*772f8765STien Fong Chee	fpga_mgr: fpga-mgr@ffd03000 {
14*772f8765STien Fong Chee		compatible = "altr,socfpga-a10-fpga-mgr";
15*772f8765STien Fong Chee		reg = <0xffd03000 0x100
16*772f8765STien Fong Chee		       0xffcfe400 0x20>;
17*772f8765STien Fong Chee		clocks = <&l4_mp_clk>;
18*772f8765STien Fong Chee		resets = <&rst FPGAMGR_RESET>;
19*772f8765STien Fong Chee	};
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