1*a0e79083SPurna Chandra Mandal* Microchip PIC32 Clock and Oscillator 2*a0e79083SPurna Chandra Mandal 3*a0e79083SPurna Chandra MandalMicrochip PIC32 clock tree consists of few oscillators, PLLs, 4*a0e79083SPurna Chandra Mandalmultiplexers and few divider modules capable of supplying clocks 5*a0e79083SPurna Chandra Mandalto various controllers within SoC and also to off-chip. 6*a0e79083SPurna Chandra Mandal 7*a0e79083SPurna Chandra MandalPIC32 clock controller output is defined by indices as defined 8*a0e79083SPurna Chandra Mandalin [0] 9*a0e79083SPurna Chandra Mandal 10*a0e79083SPurna Chandra Mandal[0] include/dt-bindings/clock/microchip,clock.h 11*a0e79083SPurna Chandra Mandal 12*a0e79083SPurna Chandra MandalRequired Properties: 13*a0e79083SPurna Chandra Mandal- compatible: should be "microchip,pic32mzda_clk" 14*a0e79083SPurna Chandra Mandal- reg: physical base address of the controller and length of memory mapped 15*a0e79083SPurna Chandra Mandal region. 16*a0e79083SPurna Chandra Mandal- #clock-cells: should be 1. 17*a0e79083SPurna Chandra Mandal 18*a0e79083SPurna Chandra MandalExample: Clock controller node: 19*a0e79083SPurna Chandra Mandal 20*a0e79083SPurna Chandra Mandal clock: clk@1f801200 { 21*a0e79083SPurna Chandra Mandal compatible = "microchip,pic32mzda-clk"; 22*a0e79083SPurna Chandra Mandal reg = <0x1f801200 0x1000>; 23*a0e79083SPurna Chandra Mandal }; 24*a0e79083SPurna Chandra Mandal 25*a0e79083SPurna Chandra MandalExample: UART controller node that consumes the clock generated by the clock 26*a0e79083SPurna Chandra Mandalcontroller: 27*a0e79083SPurna Chandra Mandal 28*a0e79083SPurna Chandra Mandal uart1: serial@1f822000 { 29*a0e79083SPurna Chandra Mandal compatible = "microchip,pic32mzda-uart"; 30*a0e79083SPurna Chandra Mandal reg = <0xbf822000 0x50>; 31*a0e79083SPurna Chandra Mandal interrupts = <112 IRQ_TYPE_LEVEL_HIGH>; 32*a0e79083SPurna Chandra Mandal clocks = <&clock PB2CLK>; 33*a0e79083SPurna Chandra Mandal }; 34