xref: /openbmc/u-boot/doc/SPI/README.ti_qspi_flash (revision 52b1eaf93d6b55e1467f97b8eefdc2f8b6031c43)
1a187559eSBin MengQSPI U-Boot support
22f24223aSPoddar, Sourav------------------
32f24223aSPoddar, Sourav
42f24223aSPoddar, SouravHost processor is connected to serial flash device via qpsi
52f24223aSPoddar, Souravinterface. QSPI is a kind of spi module that allows single,
62f24223aSPoddar, Souravdual and quad read access to external spi devices. The module
72f24223aSPoddar, Souravhas a memory mapped interface which provide direct interface
82f24223aSPoddar, Souravfor accessing data form external spi devices.
92f24223aSPoddar, Sourav
102f24223aSPoddar, SouravThe one QSPI in the device is primarily intended for fast booting
112f24223aSPoddar, Souravfrom Quad SPI flash devices.
122f24223aSPoddar, Sourav
132f24223aSPoddar, SouravUsecase
142f24223aSPoddar, Sourav-------
152f24223aSPoddar, Sourav
162f24223aSPoddar, SouravMLO/u-boot.img will be flashed from SD/MMC to the flash device
172f24223aSPoddar, Souravusing serial flash erase and write commands. Then, switch settings
182f24223aSPoddar, Souravwill be changed to qspi boot. Then, the ROM code will read MLO
192f24223aSPoddar, Souravfrom the predefined location in the flash, where it was flashed and
202f24223aSPoddar, Souravexecute it after storing it in SDRAM. Then, the MLO will read
212f24223aSPoddar, Souravu-boot.img from flash and execute it from SDRAM.
222f24223aSPoddar, Sourav
232f24223aSPoddar, SouravSPI mode
242f24223aSPoddar, Sourav-------
252f24223aSPoddar, SouravSPI mode uses mtd spi framework for transfer and reception of data.
262f24223aSPoddar, SouravCan be used in:
272f24223aSPoddar, Sourav1. Normal mode: use single pin for transfers
282f24223aSPoddar, Sourav2. Dual Mode: use two pins for transfers.
292f24223aSPoddar, Sourav3. Quad mode: use four pin for transfer
302f24223aSPoddar, Sourav
312f24223aSPoddar, SouravMemory mapped read mode
322f24223aSPoddar, Sourav-----------------------
332f24223aSPoddar, SouravIn this, SPI controller is configured using configuration port and then
34*1cc0a9f4SRobert P. J. Daycontroller is switched to memory mapped port for data read.
352f24223aSPoddar, Sourav
362f24223aSPoddar, SouravDriver
372f24223aSPoddar, Sourav------
382f24223aSPoddar, Souravdrivers/qspi/ti_qspi.c
392f24223aSPoddar, Sourav    - Newly created file which is responsible for configuring the
402f24223aSPoddar, Sourav	qspi controller and also for providing the low level api which
412f24223aSPoddar, Sourav	is responsible for transferring the datas from host controller
422f24223aSPoddar, Sourav	to flash device and vice versa.
432f24223aSPoddar, Sourav
442f24223aSPoddar, SouravTesting
452f24223aSPoddar, Sourav-------
462f24223aSPoddar, SouravA seperated file named README.dra_qspi_test has been created which gives all the
47a187559eSBin Mengdetails about the commands required to test qspi at U-Boot level.
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