1*ffdb20beSMike FrysingerSandbox SPI/SPI Flash Implementation 2*ffdb20beSMike Frysinger==================================== 3*ffdb20beSMike Frysinger 4*ffdb20beSMike FrysingerU-Boot supports SPI and SPI flash emuation in sandbox. This must be enabled 5*ffdb20beSMike Frysingerusing the --spi_sf paramter when starting U-Boot. 6*ffdb20beSMike Frysinger 7*ffdb20beSMike FrysingerFor example: 8*ffdb20beSMike Frysinger 9*ffdb20beSMike Frysinger$ make O=sandbox sandbox_config 10*ffdb20beSMike Frysinger$ make O=sandbox 11*ffdb20beSMike Frysinger$ ./sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin 12*ffdb20beSMike Frysinger 13*ffdb20beSMike FrysingerThe four parameters to spi_sf are: 14*ffdb20beSMike Frysinger 15*ffdb20beSMike Frysinger SPI bus number (typically 0) 16*ffdb20beSMike Frysinger SPI chip select number (typically 0) 17*ffdb20beSMike Frysinger SPI chip to emulate 18*ffdb20beSMike Frysinger File containing emulated data 19*ffdb20beSMike Frysinger 20*ffdb20beSMike FrysingerSupported chips are W25Q16 (2MB), W25Q32 (4MB) and W25Q128 (16MB). Once 21*ffdb20beSMike FrysingerU-Boot it started you can use 'sf' commands as normal. For example: 22*ffdb20beSMike Frysinger 23*ffdb20beSMike Frysinger$ ./b/sandbox/u-boot --spi_sf 0:0:W25Q128:b/chromeos_peach/out/image.bin \ 24*ffdb20beSMike Frysinger -c "sf probe; sf test 0 100000; sf read 0 1000 1000; \ 25*ffdb20beSMike Frysinger sf erase 1000 1000; sf write 0 1000 1000" 26*ffdb20beSMike Frysinger 27*ffdb20beSMike Frysinger 28*ffdb20beSMike FrysingerU-Boot 2013.10-00237-gd4e0fdb (Nov 07 2013 - 20:08:15) 29*ffdb20beSMike Frysinger 30*ffdb20beSMike FrysingerDRAM: 128 MiB 31*ffdb20beSMike FrysingerUsing default environment 32*ffdb20beSMike Frysinger 33*ffdb20beSMike FrysingerIn: serial 34*ffdb20beSMike FrysingerOut: serial 35*ffdb20beSMike FrysingerErr: serial 36*ffdb20beSMike FrysingerSF: Detected W25Q128BV with page size 256 Bytes, erase size 4 KiB, total 16 MiB 37*ffdb20beSMike FrysingerSPI flash test: 38*ffdb20beSMike Frysinger0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps 39*ffdb20beSMike Frysinger1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps 40*ffdb20beSMike Frysinger2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps 41*ffdb20beSMike Frysinger3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps 42*ffdb20beSMike FrysingerTest passed 43*ffdb20beSMike Frysinger0 erase: 1 ticks, 1024000 KiB/s 8192.000 Mbps 44*ffdb20beSMike Frysinger1 check: 2 ticks, 512000 KiB/s 4096.000 Mbps 45*ffdb20beSMike Frysinger2 write: 6 ticks, 170666 KiB/s 1365.328 Mbps 46*ffdb20beSMike Frysinger3 read: 0 ticks, 1048576000 KiB/s -201326.-592 Mbps 47*ffdb20beSMike FrysingerSF: 4096 bytes @ 0x1000 Read: OK 48*ffdb20beSMike FrysingerSF: 4096 bytes @ 0x1000 Erased: OK 49*ffdb20beSMike FrysingerSF: 4096 bytes @ 0x1000 Written: OK 50*ffdb20beSMike Frysinger 51*ffdb20beSMike Frysinger 52*ffdb20beSMike FrysingerSince the SPI bus is fully implemented as well as the SPI flash connected to 53*ffdb20beSMike Frysingerit, you can also use low-level SPI commands to access the flash. For example 54*ffdb20beSMike Frysingerthis reads the device ID from the emulated chip: 55*ffdb20beSMike Frysinger 56*ffdb20beSMike Frysinger=> sspi 0 32 9f 57*ffdb20beSMike FrysingerFFEF4018 58*ffdb20beSMike Frysinger 59*ffdb20beSMike Frysinger 60*ffdb20beSMike FrysingerSimon Glass 61*ffdb20beSMike Frysingersjg@chromium.org 62*ffdb20beSMike Frysinger7/11/2013 63*ffdb20beSMike FrysingerNote that the sandbox SPI implementation was written by Mike Frysinger 64*ffdb20beSMike Frysinger<vapier@gentoo.org>. 65