xref: /openbmc/u-boot/doc/README.x86 (revision 84351792)
1#
2# Copyright (C) 2014, Simon Glass <sjg@chromium.org>
3# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
4#
5# SPDX-License-Identifier:	GPL-2.0+
6#
7
8U-Boot on x86
9=============
10
11This document describes the information about U-Boot running on x86 targets,
12including supported boards, build instructions, todo list, etc.
13
14Status
15------
16U-Boot supports running as a coreboot [1] payload on x86. So far only Link
17(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should
18work with minimal adjustments on other x86 boards since coreboot deals with
19most of the low-level details.
20
21U-Boot also supports booting directly from x86 reset vector, without coreboot.
22In this case, known as bare mode, from the fact that it runs on the
23'bare metal', U-Boot acts like a BIOS replacement. The following platforms
24are supported:
25
26   - Bayley Bay CRB
27   - Congatec QEVAL 2.0 & conga-QA3/E3845
28   - Cougar Canyon 2 CRB
29   - Crown Bay CRB
30   - Galileo
31   - Link (Chromebook Pixel)
32   - Minnowboard MAX
33   - Samus (Chromebook Pixel 2015)
34   - QEMU x86
35
36As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit
37Linux kernel as part of a FIT image. It also supports a compressed zImage.
38U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks
39for more details.
40
41Build Instructions for U-Boot as coreboot payload
42-------------------------------------------------
43Building U-Boot as a coreboot payload is just like building U-Boot for targets
44on other architectures, like below:
45
46$ make coreboot-x86_defconfig
47$ make all
48
49Note this default configuration will build a U-Boot payload for the QEMU board.
50To build a coreboot payload against another board, you can change the build
51configuration during the 'make menuconfig' process.
52
53x86 architecture  --->
54	...
55	(qemu-x86) Board configuration file
56	(qemu-x86_i440fx) Board Device Tree Source (dts) file
57	(0x01920000) Board specific Cache-As-RAM (CAR) address
58	(0x4000) Board specific Cache-As-RAM (CAR) size
59
60Change the 'Board configuration file' and 'Board Device Tree Source (dts) file'
61to point to a new board. You can also change the Cache-As-RAM (CAR) related
62settings here if the default values do not fit your new board.
63
64Build Instructions for U-Boot as BIOS replacement (bare mode)
65-------------------------------------------------------------
66Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a
67little bit tricky, as generally it requires several binary blobs which are not
68shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is
69not turned on by default in the U-Boot source tree. Firstly, you need turn it
70on by enabling the ROM build:
71
72$ export BUILD_ROM=y
73
74This tells the Makefile to build u-boot.rom as a target.
75
76---
77
78Chromebook Link specific instructions for bare mode:
79
80First, you need the following binary blobs:
81
82* descriptor.bin - Intel flash descriptor
83* me.bin - Intel Management Engine
84* mrc.bin - Memory Reference Code, which sets up SDRAM
85* video ROM - sets up the display
86
87You can get these binary blobs by:
88
89$ git clone http://review.coreboot.org/p/blobs.git
90$ cd blobs
91
92Find the following files:
93
94* ./mainboard/google/link/descriptor.bin
95* ./mainboard/google/link/me.bin
96* ./northbridge/intel/sandybridge/systemagent-r6.bin
97
98The 3rd one should be renamed to mrc.bin.
99As for the video ROM, you can get it here [3] and rename it to vga.bin.
100Make sure all these binary blobs are put in the board directory.
101
102Now you can build U-Boot and obtain u-boot.rom:
103
104$ make chromebook_link_defconfig
105$ make all
106
107---
108
109Chromebook Samus (2015 Pixel) instructions for bare mode:
110
111First, you need the following binary blobs:
112
113* descriptor.bin - Intel flash descriptor
114* me.bin - Intel Management Engine
115* mrc.bin - Memory Reference Code, which sets up SDRAM
116* refcode.elf - Additional Reference code
117* vga.bin - video ROM, which sets up the display
118
119If you have a samus you can obtain them from your flash, for example, in
120developer mode on the Chromebook (use Ctrl-Alt-F2 to obtain a terminal and
121log in as 'root'):
122
123   cd /tmp
124   flashrom -w samus.bin
125   scp samus.bin username@ip_address:/path/to/somewhere
126
127If not see the coreboot tree [4] where you can use:
128
129   bash crosfirmware.sh samus
130
131to get the image. There is also an 'extract_blobs.sh' scripts that you can use
132on the 'coreboot-Google_Samus.*' file to short-circuit some of the below.
133
134Then 'ifdtool -x samus.bin' on your development machine will produce:
135
136   flashregion_0_flashdescriptor.bin
137   flashregion_1_bios.bin
138   flashregion_2_intel_me.bin
139
140Rename flashregion_0_flashdescriptor.bin to descriptor.bin
141Rename flashregion_2_intel_me.bin to me.bin
142You can ignore flashregion_1_bios.bin - it is not used.
143
144To get the rest, use 'cbfstool samus.bin print':
145
146samus.bin: 8192 kB, bootblocksize 2864, romsize 8388608, offset 0x700000
147alignment: 64 bytes, architecture: x86
148
149Name                           Offset     Type         Size
150cmos_layout.bin                0x700000   cmos_layout  1164
151pci8086,0406.rom               0x7004c0   optionrom    65536
152spd.bin                        0x710500   (unknown)    4096
153cpu_microcode_blob.bin         0x711540   microcode    70720
154fallback/romstage              0x722a00   stage        54210
155fallback/ramstage              0x72fe00   stage        96382
156config                         0x7476c0   raw          6075
157fallback/vboot                 0x748ec0   stage        15980
158fallback/refcode               0x74cd80   stage        75578
159fallback/payload               0x75f500   payload      62878
160u-boot.dtb                     0x76eb00   (unknown)    5318
161(empty)                        0x770000   null         196504
162mrc.bin                        0x79ffc0   (unknown)    222876
163(empty)                        0x7d66c0   null         167320
164
165You can extract what you need:
166
167   cbfstool samus.bin extract -n pci8086,0406.rom -f vga.bin
168   cbfstool samus.bin extract -n fallback/refcode -f refcode.rmod
169   cbfstool samus.bin extract -n mrc.bin -f mrc.bin
170   cbfstool samus.bin extract -n fallback/refcode -f refcode.bin -U
171
172Note that the -U flag is only supported by the latest cbfstool. It unpacks
173and decompresses the stage to produce a coreboot rmodule. This is a simple
174representation of an ELF file. You need the patch "Support decoding a stage
175with compression".
176
177Put all 5 files into board/google/chromebook_samus.
178
179Now you can build U-Boot and obtain u-boot.rom:
180
181$ make chromebook_link_defconfig
182$ make all
183
184If you are using em100, then this command will flash write -Boot:
185
186   em100 -s -d filename.rom -c W25Q64CV -r
187
188---
189
190Intel Crown Bay specific instructions for bare mode:
191
192U-Boot support of Intel Crown Bay board [4] relies on a binary blob called
193Firmware Support Package [5] to perform all the necessary initialization steps
194as documented in the BIOS Writer Guide, including initialization of the CPU,
195memory controller, chipset and certain bus interfaces.
196
197Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T,
198install it on your host and locate the FSP binary blob. Note this platform
199also requires a Chipset Micro Code (CMC) state machine binary to be present in
200the SPI flash where u-boot.rom resides, and this CMC binary blob can be found
201in this FSP package too.
202
203* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd
204* ./Microcode/C0_22211.BIN
205
206Rename the first one to fsp.bin and second one to cmc.bin and put them in the
207board directory.
208
209Note the FSP release version 001 has a bug which could cause random endless
210loop during the FspInit call. This bug was published by Intel although Intel
211did not describe any details. We need manually apply the patch to the FSP
212binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP
213binary, change the following five bytes values from orginally E8 42 FF FF FF
214to B8 00 80 0B 00.
215
216As for the video ROM, you need manually extract it from the Intel provided
217BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM
218ID 8086:4108, extract and save it as vga.bin in the board directory.
219
220Now you can build U-Boot and obtain u-boot.rom
221
222$ make crownbay_defconfig
223$ make all
224
225---
226
227Intel Cougar Canyon 2 specific instructions for bare mode:
228
229This uses Intel FSP for 3rd generation Intel Core and Intel Celeron processors
230with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP
231website and put the .fd file (CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd at the
232time of writing) in the board directory and rename it to fsp.bin.
233
234Now build U-Boot and obtain u-boot.rom
235
236$ make cougarcanyon2_defconfig
237$ make all
238
239The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in
240the board manual. The SPI-0 flash should have flash descriptor plus ME firmware
241and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0
242flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program
243this image to the SPI-0 flash according to the board manual just once and we are
244all set. For programming U-Boot we just need to program SPI-1 flash.
245
246---
247
248Intel Bay Trail based board instructions for bare mode:
249
250This uses as FSP as with Crown Bay, except it is for the Atom E3800 series.
251Two boards that use this configuration are Bayley Bay and Minnowboard MAX.
252Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at
253the time of writing). Put it in the corresponding board directory and rename
254it to fsp.bin.
255
256Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same
257board directory as vga.bin.
258
259You still need two more binary blobs. For Bayley Bay, they can be extracted
260from the sample SPI image provided in the FSP (SPI.bin at the time of writing).
261
262   $ ./tools/ifdtool -x BayleyBay/SPI.bin
263   $ cp flashregion_0_flashdescriptor.bin board/intel/bayleybay/descriptor.bin
264   $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin
265
266For Minnowboard MAX, we can reuse the same ME firmware above, but for flash
267descriptor, we need get that somewhere else, as the one above does not seem to
268work, probably because it is not designed for the Minnowboard MAX. Now download
269the original firmware image for this board from:
270
271http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
272
273Unzip it:
274
275   $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip
276
277Use ifdtool in the U-Boot tools directory to extract the images from that
278file, for example:
279
280   $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin
281
282This will provide the descriptor file - copy this into the correct place:
283
284   $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin
285
286Now you can build U-Boot and obtain u-boot.rom
287Note: below are examples/information for Minnowboard MAX.
288
289$ make minnowmax_defconfig
290$ make all
291
292Checksums are as follows (but note that newer versions will invalidate this):
293
294$ md5sum -b board/intel/minnowmax/*.bin
295ffda9a3b94df5b74323afb328d51e6b4  board/intel/minnowmax/descriptor.bin
29669f65b9a580246291d20d08cbef9d7c5  board/intel/minnowmax/fsp.bin
297894a97d371544ec21de9c3e8e1716c4b  board/intel/minnowmax/me.bin
298a2588537da387da592a27219d56e9962  board/intel/minnowmax/vga.bin
299
300The ROM image is broken up into these parts:
301
302Offset   Description         Controlling config
303------------------------------------------------------------
304000000   descriptor.bin      Hard-coded to 0 in ifdtool
305001000   me.bin              Set by the descriptor
306500000   <spare>
3076ef000   Environment         CONFIG_ENV_OFFSET
3086f0000   MRC cache           CONFIG_ENABLE_MRC_CACHE
309700000   u-boot-dtb.bin      CONFIG_SYS_TEXT_BASE
310790000   vga.bin             CONFIG_VGA_BIOS_ADDR
3117c0000   fsp.bin             CONFIG_FSP_ADDR
3127f8000   <spare>             (depends on size of fsp.bin)
3137ff800   U-Boot 16-bit boot  CONFIG_SYS_X86_START16
314
315Overall ROM image size is controlled by CONFIG_ROM_SIZE.
316
317Note that the debug version of the FSP is bigger in size. If this version
318is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of
319the default value 0xfffc0000.
320
321---
322
323Intel Galileo instructions for bare mode:
324
325Only one binary blob is needed for Remote Management Unit (RMU) within Intel
326Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is
327needed by the Quark SoC itself.
328
329You can get the binary blob from Quark Board Support Package from Intel website:
330
331* ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin
332
333Rename the file and put it to the board directory by:
334
335   $ cp RMU.bin board/intel/galileo/rmu.bin
336
337Now you can build U-Boot and obtain u-boot.rom
338
339$ make galileo_defconfig
340$ make all
341
342---
343
344QEMU x86 target instructions for bare mode:
345
346To build u-boot.rom for QEMU x86 targets, just simply run
347
348$ make qemu-x86_defconfig
349$ make all
350
351Note this default configuration will build a U-Boot for the QEMU x86 i440FX
352board. To build a U-Boot against QEMU x86 Q35 board, you can change the build
353configuration during the 'make menuconfig' process like below:
354
355Device Tree Control  --->
356	...
357	(qemu-x86_q35) Default Device Tree for DT control
358
359Test with coreboot
360------------------
361For testing U-Boot as the coreboot payload, there are things that need be paid
362attention to. coreboot supports loading an ELF executable and a 32-bit plain
363binary, as well as other supported payloads. With the default configuration,
364U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the
365generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool
366provided by coreboot) manually as coreboot's 'make menuconfig' does not provide
367this capability yet. The command is as follows:
368
369# in the coreboot root directory
370$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \
371  -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000
372
373Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address
374of _x86boot_start (in arch/x86/cpu/start.S).
375
376If you want to use ELF as the coreboot payload, change U-Boot configuration to
377use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE.
378
379To enable video you must enable these options in coreboot:
380
381   - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5))
382   - Keep VESA framebuffer
383
384At present it seems that for Minnowboard Max, coreboot does not pass through
385the video information correctly (it always says the resolution is 0x0). This
386works correctly for link though.
387
388Test with QEMU for bare mode
389----------------------------
390QEMU is a fancy emulator that can enable us to test U-Boot without access to
391a real x86 board. Please make sure your QEMU version is 2.3.0 or above test
392U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows:
393
394$ qemu-system-i386 -nographic -bios path/to/u-boot.rom
395
396This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU
397also supports emulating an x86 board with Q35 and ICH9 based chipset, which is
398also supported by U-Boot. To instantiate such a machine, call QEMU with:
399
400$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35
401
402Note by default QEMU instantiated boards only have 128 MiB system memory. But
403it is enough to have U-Boot boot and function correctly. You can increase the
404system memory by pass '-m' parameter to QEMU if you want more memory:
405
406$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024
407
408This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only
409supports 3 GiB maximum system memory and reserves the last 1 GiB address space
410for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m'
411would be 3072.
412
413QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will
414show QEMU's VGA console window. Note this will disable QEMU's serial output.
415If you want to check both consoles, use '-serial stdio'.
416
417Multicore is also supported by QEMU via '-smp n' where n is the number of cores
418to instantiate. Note, the maximum supported CPU number in QEMU is 255.
419
420The fw_cfg interface in QEMU also provides information about kernel data,
421initrd, command-line arguments and more. U-Boot supports directly accessing
422these informtion from fw_cfg interface, which saves the time of loading them
423from hard disk or network again, through emulated devices. To use it , simply
424providing them in QEMU command line:
425
426$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage
427    -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8
428
429Note: -initrd and -smp are both optional
430
431Then start QEMU, in U-Boot command line use the following U-Boot command to
432setup kernel:
433
434 => qfw
435qfw - QEMU firmware interface
436
437Usage:
438qfw <command>
439    - list                             : print firmware(s) currently loaded
440    - cpus                             : print online cpu number
441    - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot
442
443=> qfw load
444loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50
445
446Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then,
447'zboot' can be used to boot the kernel:
448
449=> zboot 02000000 - 04000000 1b1ab50
450
451CPU Microcode
452-------------
453Modern CPUs usually require a special bit stream called microcode [8] to be
454loaded on the processor after power up in order to function properly. U-Boot
455has already integrated these as hex dumps in the source tree.
456
457SMP Support
458-----------
459On a multicore system, U-Boot is executed on the bootstrap processor (BSP).
460Additional application processors (AP) can be brought up by U-Boot. In order to
461have an SMP kernel to discover all of the available processors, U-Boot needs to
462prepare configuration tables which contain the multi-CPUs information before
463loading the OS kernel. Currently U-Boot supports generating two types of tables
464for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP)
465[10] tables. The writing of these two tables are controlled by two Kconfig
466options GENERATE_SFI_TABLE and GENERATE_MP_TABLE.
467
468Driver Model
469------------
470x86 has been converted to use driver model for serial, GPIO, SPI, SPI flash,
471keyboard, real-time clock, USB. Video is in progress.
472
473Device Tree
474-----------
475x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to
476be turned on. Not every device on the board is configured via device tree, but
477more and more devices will be added as time goes by. Check out the directory
478arch/x86/dts/ for these device tree source files.
479
480Useful Commands
481---------------
482In keeping with the U-Boot philosophy of providing functions to check and
483adjust internal settings, there are several x86-specific commands that may be
484useful:
485
486fsp  - Display information about Intel Firmware Support Package (FSP).
487	 This is only available on platforms which use FSP, mostly Atom.
488iod  - Display I/O memory
489iow  - Write I/O memory
490mtrr - List and set the Memory Type Range Registers (MTRR). These are used to
491	 tell the CPU whether memory is cacheable and if so the cache write
492	 mode to use. U-Boot sets up some reasonable values but you can
493	 adjust then with this command.
494
495Booting Ubuntu
496--------------
497As an example of how to set up your boot flow with U-Boot, here are
498instructions for starting Ubuntu from U-Boot. These instructions have been
499tested on Minnowboard MAX with a SATA drive but are equally applicable on
500other platforms and other media. There are really only four steps and it's a
501very simple script, but a more detailed explanation is provided here for
502completeness.
503
504Note: It is possible to set up U-Boot to boot automatically using syslinux.
505It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the
506GUID. If you figure these out, please post patches to this README.
507
508Firstly, you will need Ubuntu installed on an available disk. It should be
509possible to make U-Boot start a USB start-up disk but for now let's assume
510that you used another boot loader to install Ubuntu.
511
512Use the U-Boot command line to find the UUID of the partition you want to
513boot. For example our disk is SCSI device 0:
514
515=> part list scsi 0
516
517Partition Map for SCSI device 0  --   Partition Type: EFI
518
519   Part	Start LBA	End LBA		Name
520	Attributes
521	Type GUID
522	Partition GUID
523   1	0x00000800	0x001007ff	""
524	attrs:	0x0000000000000000
525	type:	c12a7328-f81f-11d2-ba4b-00a0c93ec93b
526	guid:	9d02e8e4-4d59-408f-a9b0-fd497bc9291c
527   2	0x00100800	0x037d8fff	""
528	attrs:	0x0000000000000000
529	type:	0fc63daf-8483-4772-8e79-3d69d8477de4
530	guid:	965c59ee-1822-4326-90d2-b02446050059
531   3	0x037d9000	0x03ba27ff	""
532	attrs:	0x0000000000000000
533	type:	0657fd6d-a4ab-43c4-84e5-0933c84b4f4f
534	guid:	2c4282bd-1e82-4bcf-a5ff-51dedbf39f17
535   =>
536
537This shows that your SCSI disk has three partitions. The really long hex
538strings are called Globally Unique Identifiers (GUIDs). You can look up the
539'type' ones here [11]. On this disk the first partition is for EFI and is in
540VFAT format (DOS/Windows):
541
542   => fatls scsi 0:1
543               efi/
544
545   0 file(s), 1 dir(s)
546
547
548Partition 2 is 'Linux filesystem data' so that will be our root disk. It is
549in ext2 format:
550
551   => ext2ls scsi 0:2
552   <DIR>       4096 .
553   <DIR>       4096 ..
554   <DIR>      16384 lost+found
555   <DIR>       4096 boot
556   <DIR>      12288 etc
557   <DIR>       4096 media
558   <DIR>       4096 bin
559   <DIR>       4096 dev
560   <DIR>       4096 home
561   <DIR>       4096 lib
562   <DIR>       4096 lib64
563   <DIR>       4096 mnt
564   <DIR>       4096 opt
565   <DIR>       4096 proc
566   <DIR>       4096 root
567   <DIR>       4096 run
568   <DIR>      12288 sbin
569   <DIR>       4096 srv
570   <DIR>       4096 sys
571   <DIR>       4096 tmp
572   <DIR>       4096 usr
573   <DIR>       4096 var
574   <SYM>         33 initrd.img
575   <SYM>         30 vmlinuz
576   <DIR>       4096 cdrom
577   <SYM>         33 initrd.img.old
578   =>
579
580and if you look in the /boot directory you will see the kernel:
581
582   => ext2ls scsi 0:2 /boot
583   <DIR>       4096 .
584   <DIR>       4096 ..
585   <DIR>       4096 efi
586   <DIR>       4096 grub
587            3381262 System.map-3.13.0-32-generic
588            1162712 abi-3.13.0-32-generic
589             165611 config-3.13.0-32-generic
590             176500 memtest86+.bin
591             178176 memtest86+.elf
592             178680 memtest86+_multiboot.bin
593            5798112 vmlinuz-3.13.0-32-generic
594             165762 config-3.13.0-58-generic
595            1165129 abi-3.13.0-58-generic
596            5823136 vmlinuz-3.13.0-58-generic
597           19215259 initrd.img-3.13.0-58-generic
598            3391763 System.map-3.13.0-58-generic
599            5825048 vmlinuz-3.13.0-58-generic.efi.signed
600           28304443 initrd.img-3.13.0-32-generic
601   =>
602
603The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of
604self-extracting compressed file mixed with some 'setup' configuration data.
605Despite its size (uncompressed it is >10MB) this only includes a basic set of
606device drivers, enough to boot on most hardware types.
607
608The 'initrd' files contain a RAM disk. This is something that can be loaded
609into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots
610of drivers for whatever hardware you might have. It is loaded before the
611real root disk is accessed.
612
613The numbers after the end of each file are the version. Here it is Linux
614version 3.13. You can find the source code for this in the Linux tree with
615the tag v3.13. The '.0' allows for additional Linux releases to fix problems,
616but normally this is not needed. The '-58' is used by Ubuntu. Each time they
617release a new kernel they increment this number. New Ubuntu versions might
618include kernel patches to fix reported bugs. Stable kernels can exist for
619some years so this number can get quite high.
620
621The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own
622secure boot mechanism - see [12] [13] and cannot read .efi files at present.
623
624To boot Ubuntu from U-Boot the steps are as follows:
625
6261. Set up the boot arguments. Use the GUID for the partition you want to
627boot:
628
629   => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro
630
631Here root= tells Linux the location of its root disk. The disk is specified
632by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory'
633containing all the GUIDs Linux has found. When it starts up, there will be a
634file in that directory with this name in it. It is also possible to use a
635device name here, see later.
636
6372. Load the kernel. Since it is an ext2/4 filesystem we can do:
638
639   => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic
640
641The address 30000000 is arbitrary, but there seem to be problems with using
642small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into
643the start of RAM (which is at 0 on x86).
644
6453. Load the ramdisk (to 64MB):
646
647   => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic
648
6494. Start up the kernel. We need to know the size of the ramdisk, but can use
650a variable for that. U-Boot sets 'filesize' to the size of the last file it
651loaded.
652
653   => zboot 03000000 0 04000000 ${filesize}
654
655Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is
656quite verbose when it boots a kernel. You should see these messages from
657U-Boot:
658
659   Valid Boot Flag
660   Setup Size = 0x00004400
661   Magic signature found
662   Using boot protocol version 2.0c
663   Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015
664   Building boot_params at 0x00090000
665   Loading bzImage at address 100000 (5805728 bytes)
666   Magic signature found
667   Initial RAM disk at linear address 0x04000000, size 19215259 bytes
668   Kernel command line: "root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro"
669
670   Starting kernel ...
671
672U-Boot prints out some bootstage timing. This is more useful if you put the
673above commands into a script since then it will be faster.
674
675   Timer summary in microseconds:
676          Mark    Elapsed  Stage
677             0          0  reset
678       241,535    241,535  board_init_r
679     2,421,611  2,180,076  id=64
680     2,421,790        179  id=65
681     2,428,215      6,425  main_loop
682    48,860,584 46,432,369  start_kernel
683
684   Accumulated time:
685                  240,329  ahci
686                1,422,704  vesa display
687
688Now the kernel actually starts: (if you want to examine kernel boot up message
689on the serial console, append "console=ttyS0,115200" to the kernel command line)
690
691   [    0.000000] Initializing cgroup subsys cpuset
692   [    0.000000] Initializing cgroup subsys cpu
693   [    0.000000] Initializing cgroup subsys cpuacct
694   [    0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22)
695   [    0.000000] Command line: root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro console=ttyS0,115200
696
697It continues for a long time. Along the way you will see it pick up your
698ramdisk:
699
700   [    0.000000] RAMDISK: [mem 0x04000000-0x05253fff]
701...
702   [    0.788540] Trying to unpack rootfs image as initramfs...
703   [    1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000)
704...
705
706Later it actually starts using it:
707
708   Begin: Running /scripts/local-premount ... done.
709
710You should also see your boot disk turn up:
711
712   [    4.357243] scsi 1:0:0:0: Direct-Access     ATA      ADATA SP310      5.2  PQ: 0 ANSI: 5
713   [    4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB)
714   [    4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0
715   [    4.381859] sd 1:0:0:0: [sda] Write Protect is off
716   [    4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
717   [    4.399535]  sda: sda1 sda2 sda3
718
719Linux has found the three partitions (sda1-3). Mercifully it doesn't print out
720the GUIDs. In step 1 above we could have used:
721
722   setenv bootargs root=/dev/sda2 ro
723
724instead of the GUID. However if you add another drive to your board the
725numbering may change whereas the GUIDs will not. So if your boot partition
726becomes sdb2, it will still boot. For embedded systems where you just want to
727boot the first disk, you have that option.
728
729The last thing you will see on the console is mention of plymouth (which
730displays the Ubuntu start-up screen) and a lot of 'Starting' messages:
731
732 * Starting Mount filesystems on boot                                    [ OK ]
733
734After a pause you should see a login screen on your display and you are done.
735
736If you want to put this in a script you can use something like this:
737
738   setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro
739   setenv boot zboot 03000000 0 04000000 \${filesize}
740   setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot"
741   saveenv
742
743The \ is to tell the shell not to evaluate ${filesize} as part of the setenv
744command.
745
746You can also bake this behaviour into your build by hard-coding the
747environment variables if you add this to minnowmax.h:
748
749#undef CONFIG_BOOTARGS
750#undef CONFIG_BOOTCOMMAND
751
752#define CONFIG_BOOTARGS		\
753	"root=/dev/sda2 ro"
754#define CONFIG_BOOTCOMMAND	\
755	"ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \
756	"ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \
757	"run boot"
758
759#undef CONFIG_EXTRA_ENV_SETTINGS
760#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}"
761
762Test with SeaBIOS
763-----------------
764SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run
765in an emulator or natively on x86 hardware with the use of U-Boot. With its
766help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS.
767
768As U-Boot, we have to manually create a table where SeaBIOS gets various system
769information (eg: E820) from. The table unfortunately has to follow the coreboot
770table format as SeaBIOS currently supports booting as a coreboot payload.
771
772To support loading SeaBIOS, U-Boot should be built with CONFIG_SEABIOS on.
773Booting SeaBIOS is done via U-Boot's bootelf command, like below:
774
775   => tftp bios.bin.elf;bootelf
776   Using e1000#0 device
777   TFTP from server 10.10.0.100; our IP address is 10.10.0.108
778   ...
779   Bytes transferred = 122124 (1dd0c hex)
780   ## Starting application at 0x000ff06e ...
781   SeaBIOS (version rel-1.9.0)
782   ...
783
784bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree.
785Make sure it is built as follows:
786
787   $ make menuconfig
788
789Inside the "General Features" menu, select "Build for coreboot" as the
790"Build Target". Inside the "Debugging" menu, turn on "Serial port debugging"
791so that we can see something as soon as SeaBIOS boots. Leave other options
792as in their default state. Then,
793
794   $ make
795   ...
796   Total size: 121888  Fixed: 66496  Free: 9184 (used 93.0% of 128KiB rom)
797   Creating out/bios.bin.elf
798
799Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS
800to install/boot a Windows XP OS (below for example command to install Windows).
801
802   # Create a 10G disk.img as the virtual hard disk
803   $ qemu-img create -f qcow2 disk.img 10G
804
805   # Install a Windows XP OS from an ISO image 'winxp.iso'
806   $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512
807
808   # Boot a Windows XP OS installed on the virutal hard disk
809   $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -smp 2 -m 512
810
811This is also tested on Intel Crown Bay board with a PCIe graphics card, booting
812SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally.
813
814If you are using Intel Integrated Graphics Device (IGD) as the primary display
815device on your board, SeaBIOS needs to be patched manually to get its VGA ROM
816loaded and run by SeaBIOS. SeaBIOS locates VGA ROM via the PCI expansion ROM
817register, but IGD device does not have its VGA ROM mapped by this register.
818Its VGA ROM is packaged as part of u-boot.rom at a configurable flash address
819which is unknown to SeaBIOS. An example patch is needed for SeaBIOS below:
820
821diff --git a/src/optionroms.c b/src/optionroms.c
822index 65f7fe0..c7b6f5e 100644
823--- a/src/optionroms.c
824+++ b/src/optionroms.c
825@@ -324,6 +324,8 @@ init_pcirom(struct pci_device *pci, int isvga, u64 *sources)
826         rom = deploy_romfile(file);
827     else if (RunPCIroms > 1 || (RunPCIroms == 1 && isvga))
828         rom = map_pcirom(pci);
829+    if (pci->bdf == pci_to_bdf(0, 2, 0))
830+        rom = (struct rom_header *)0xfff90000;
831     if (! rom)
832         // No ROM present.
833         return;
834
835Note: the patch above expects IGD device is at PCI b.d.f 0.2.0 and its VGA ROM
836is at 0xfff90000 which corresponds to CONFIG_VGA_BIOS_ADDR on Minnowboard MAX.
837Change these two accordingly if this is not the case on your board.
838
839Development Flow
840----------------
841These notes are for those who want to port U-Boot to a new x86 platform.
842
843Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment.
844The Dediprog em100 can be used on Linux. The em100 tool is available here:
845
846   http://review.coreboot.org/p/em100.git
847
848On Minnowboard Max the following command line can be used:
849
850   sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r
851
852A suitable clip for connecting over the SPI flash chip is here:
853
854   http://www.dediprog.com/pd/programmer-accessories/EM-TC-8
855
856This allows you to override the SPI flash contents for development purposes.
857Typically you can write to the em100 in around 1200ms, considerably faster
858than programming the real flash device each time. The only important
859limitation of the em100 is that it only supports SPI bus speeds up to 20MHz.
860This means that images must be set to boot with that speed. This is an
861Intel-specific feature - e.g. tools/ifttool has an option to set the SPI
862speed in the SPI descriptor region.
863
864If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly
865easy to fit it in. You can follow the Minnowboard Max implementation, for
866example. Hopefully you will just need to create new files similar to those
867in arch/x86/cpu/baytrail which provide Bay Trail support.
868
869If you are not using an FSP you have more freedom and more responsibility.
870The ivybridge support works this way, although it still uses a ROM for
871graphics and still has binary blobs containing Intel code. You should aim to
872support all important peripherals on your platform including video and storage.
873Use the device tree for configuration where possible.
874
875For the microcode you can create a suitable device tree file using the
876microcode tool:
877
878  ./tools/microcode-tool -d microcode.dat -m <model> create
879
880or if you only have header files and not the full Intel microcode.dat database:
881
882  ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \
883	-H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \
884	-m all create
885
886These are written to arch/x86/dts/microcode/ by default.
887
888Note that it is possible to just add the micrcode for your CPU if you know its
889model. U-Boot prints this information when it starts
890
891   CPU: x86_64, vendor Intel, device 30673h
892
893so here we can use the M0130673322 file.
894
895If you platform can display POST codes on two little 7-segment displays on
896the board, then you can use post_code() calls from C or assembler to monitor
897boot progress. This can be good for debugging.
898
899If not, you can try to get serial working as early as possible. The early
900debug serial port may be useful here. See setup_internal_uart() for an example.
901
902During the U-Boot porting, one of the important steps is to write correct PIRQ
903routing information in the board device tree. Without it, device drivers in the
904Linux kernel won't function correctly due to interrupt is not working. Please
905refer to U-Boot doc [15] for the device tree bindings of Intel interrupt router.
906Here we have more details on the intel,pirq-routing property below.
907
908	intel,pirq-routing = <
909		PCI_BDF(0, 2, 0) INTA PIRQA
910		...
911	>;
912
913As you see each entry has 3 cells. For the first one, we need describe all pci
914devices mounted on the board. For SoC devices, normally there is a chapter on
915the chipset datasheet which lists all the available PCI devices. For example on
916Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we
917can get the interrupt pin either from datasheet or hardware via U-Boot shell.
918The reliable source is the hardware as sometimes chipset datasheet is not 100%
919up-to-date. Type 'pci header' plus the device's pci bus/device/function number
920from U-Boot shell below.
921
922  => pci header 0.1e.1
923    vendor ID =			0x8086
924    device ID =			0x0f08
925    ...
926    interrupt line =		0x09
927    interrupt pin =		0x04
928    ...
929
930It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin
931register. Repeat this until you get interrupt pins for all the devices. The last
932cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel
933chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This
934can be changed by registers in LPC bridge. So far Intel FSP does not touch those
935registers so we can write down the PIRQ according to the default mapping rule.
936
937Once we get the PIRQ routing information in the device tree, the interrupt
938allocation and assignment will be done by U-Boot automatically. Now you can
939enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and
940CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC.
941
942This script might be useful. If you feed it the output of 'pci long' from
943U-Boot then it will generate a device tree fragment with the interrupt
944configuration for each device (note it needs gawk 4.0.0):
945
946   $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \
947	/interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \
948	{patsplit(device, bdf, "[0-9a-f]+"); \
949	printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \
950	strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}'
951
952Example output:
953   PCI_BDF(0, 2, 0) INTA PIRQA
954   PCI_BDF(0, 3, 0) INTA PIRQA
955...
956
957Porting Hints
958-------------
959
960Quark-specific considerations:
961
962To port U-Boot to other boards based on the Intel Quark SoC, a few things need
963to be taken care of. The first important part is the Memory Reference Code (MRC)
964parameters. Quark MRC supports memory-down configuration only. All these MRC
965parameters are supplied via the board device tree. To get started, first copy
966the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then
967change these values by consulting board manuals or your hardware vendor.
968Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h.
969The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports,
970but by default they are held in reset after power on. In U-Boot, PCIe
971initialization is properly handled as per Quark's firmware writer guide.
972In your board support codes, you need provide two routines to aid PCIe
973initialization, which are board_assert_perst() and board_deassert_perst().
974The two routines need implement a board-specific mechanism to assert/deassert
975PCIe PERST# pin. Care must be taken that in those routines that any APIs that
976may trigger PCI enumeration process are strictly forbidden, as any access to
977PCIe root port's configuration registers will cause system hang while it is
978held in reset. For more details, check how they are implemented by the Intel
979Galileo board support codes in board/intel/galileo/galileo.c.
980
981coreboot:
982
983See scripts/coreboot.sed which can assist with porting coreboot code into
984U-Boot drivers. It will not resolve all build errors, but will perform common
985transformations. Remember to add attribution to coreboot for new files added
986to U-Boot. This should go at the top of each file and list the coreboot
987filename where the code originated.
988
989Debugging ACPI issues with Windows:
990
991Windows might cache system information and only detect ACPI changes if you
992modify the ACPI table versions. So tweak them liberally when debugging ACPI
993issues with Windows.
994
995ACPI Support Status
996-------------------
997Advanced Configuration and Power Interface (ACPI) [16] aims to establish
998industry-standard interfaces enabling OS-directed configuration, power
999management, and thermal management of mobile, desktop, and server platforms.
1000
1001Linux can boot without ACPI with "acpi=off" command line parameter, but
1002with ACPI the kernel gains the capabilities to handle power management.
1003For Windows, ACPI is a must-have firmware feature since Windows Vista.
1004CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in
1005U-Boot. This requires Intel ACPI compiler to be installed on your host to
1006compile ACPI DSDT table written in ASL format to AML format. You can get
1007the compiler via "apt-get install iasl" if you are on Ubuntu or download
1008the source from [17] to compile one by yourself.
1009
1010Current ACPI support in U-Boot is not complete. More features will be added
1011in the future. The status as of today is:
1012
1013 * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables.
1014 * Support one static DSDT table only, compiled by Intel ACPI compiler.
1015 * Support S0/S5, reboot and shutdown from OS.
1016 * Support booting a pre-installed Ubuntu distribution via 'zboot' command.
1017 * Support installing and booting Ubuntu 14.04 (or above) from U-Boot with
1018   the help of SeaBIOS using legacy interface (non-UEFI mode).
1019 * Support installing and booting Windows 8.1/10 from U-Boot with the help
1020   of SeaBIOS using legacy interface (non-UEFI mode).
1021 * Support ACPI interrupts with SCI only.
1022
1023Features not supported so far (to make it a complete ACPI solution):
1024 * S3 (Suspend to RAM), S4 (Suspend to Disk).
1025
1026Features that are optional:
1027 * Dynamic AML bytecodes insertion at run-time. We may need this to support
1028   SSDT table generation and DSDT fix up.
1029 * SMI support. Since U-Boot is a modern bootloader, we don't want to bring
1030   those legacy stuff into U-Boot. ACPI spec allows a system that does not
1031   support SMI (a legacy-free system).
1032
1033ACPI was initially enabled on BayTrail based boards. Testing was done by booting
1034a pre-installed Ubuntu 14.04 from a SATA drive. Installing Ubuntu 14.04 and
1035Windows 8.1/10 to a SATA drive and booting from there is also tested. Most
1036devices seem to work correctly and the board can respond a reboot/shutdown
1037command from the OS.
1038
1039For other platform boards, ACPI support status can be checked by examining their
1040board defconfig files to see if CONFIG_GENERATE_ACPI_TABLE is set to y.
1041
1042EFI Support
1043-----------
1044U-Boot supports booting as a 32-bit or 64-bit EFI payload, e.g. with UEFI.
1045This is enabled with CONFIG_EFI_STUB. U-Boot can also run as an EFI
1046application, with CONFIG_EFI_APP. The CONFIG_EFI_LOADER option, where U-Booot
1047provides an EFI environment to the kernel (i.e. replaces UEFI completely but
1048provides the same EFI run-time services) is not currently supported on x86.
1049
1050See README.efi for details of EFI support in U-Boot.
1051
105264-bit Support
1053--------------
1054U-Boot supports booting a 64-bit kernel directly and is able to change to
105564-bit mode to do so. It also supports (with CONFIG_EFI_STUB) booting from
1056both 32-bit and 64-bit UEFI. However, U-Boot itself is currently always built
1057in 32-bit mode. Some access to the full memory range is provided with
1058arch_phys_memset().
1059
1060The development work to make U-Boot itself run in 64-bit mode has not yet
1061been attempted. The best approach would likely be to build a 32-bit SPL
1062image for U-Boot, with CONFIG_SPL_BUILD. This could then handle the early CPU
1063init in 16-bit and 32-bit mode, running the FSP and any other binaries that
1064are needed. Then it could change to 64-bit model and jump to U-Boot proper.
1065
1066Given U-Boot's extensive 64-bit support this has not been a high priority,
1067but it would be a nice addition.
1068
1069TODO List
1070---------
1071- Audio
1072- Chrome OS verified boot
1073- Support for CONFIG_EFI_LOADER
1074- Building U-Boot to run in 64-bit mode
1075
1076References
1077----------
1078[1] http://www.coreboot.org
1079[2] http://www.qemu.org
1080[3] http://www.coreboot.org/~stepan/pci8086,0166.rom
1081[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html
1082[5] http://www.intel.com/fsp
1083[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html
1084[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/
1085[8] http://en.wikipedia.org/wiki/Microcode
1086[9] http://simplefirmware.org
1087[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm
1088[11] https://en.wikipedia.org/wiki/GUID_Partition_Table
1089[12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf
1090[13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf
1091[14] http://www.seabios.org/SeaBIOS
1092[15] doc/device-tree-bindings/misc/intel,irq-router.txt
1093[16] http://www.acpi.info
1094[17] https://www.acpica.org/downloads
1095