1# 2# Copyright (C) 2014, Simon Glass <sjg@chromium.org> 3# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 4# 5# SPDX-License-Identifier: GPL-2.0+ 6# 7 8U-Boot on x86 9============= 10 11This document describes the information about U-Boot running on x86 targets, 12including supported boards, build instructions, todo list, etc. 13 14Status 15------ 16U-Boot supports running as a coreboot [1] payload on x86. So far only Link 17(Chromebook Pixel) and QEMU [2] x86 targets have been tested, but it should 18work with minimal adjustments on other x86 boards since coreboot deals with 19most of the low-level details. 20 21U-Boot also supports booting directly from x86 reset vector, without coreboot. 22In this case, known as bare mode, from the fact that it runs on the 23'bare metal', U-Boot acts like a BIOS replacement. The following platforms 24are supported: 25 26 - Bayley Bay CRB 27 - Congatec QEVAL 2.0 & conga-QA3/E3845 28 - Cougar Canyon 2 CRB 29 - Crown Bay CRB 30 - Galileo 31 - Link (Chromebook Pixel) 32 - Minnowboard MAX 33 - Samus (Chromebook Pixel 2015) 34 - QEMU x86 35 36As for loading an OS, U-Boot supports directly booting a 32-bit or 64-bit 37Linux kernel as part of a FIT image. It also supports a compressed zImage. 38U-Boot supports loading an x86 VxWorks kernel. Please check README.vxworks 39for more details. 40 41Build Instructions for U-Boot as coreboot payload 42------------------------------------------------- 43Building U-Boot as a coreboot payload is just like building U-Boot for targets 44on other architectures, like below: 45 46$ make coreboot-x86_defconfig 47$ make all 48 49Note this default configuration will build a U-Boot payload for the QEMU board. 50To build a coreboot payload against another board, you can change the build 51configuration during the 'make menuconfig' process. 52 53x86 architecture ---> 54 ... 55 (qemu-x86) Board configuration file 56 (qemu-x86_i440fx) Board Device Tree Source (dts) file 57 (0x01920000) Board specific Cache-As-RAM (CAR) address 58 (0x4000) Board specific Cache-As-RAM (CAR) size 59 60Change the 'Board configuration file' and 'Board Device Tree Source (dts) file' 61to point to a new board. You can also change the Cache-As-RAM (CAR) related 62settings here if the default values do not fit your new board. 63 64Build Instructions for U-Boot as BIOS replacement (bare mode) 65------------------------------------------------------------- 66Building a ROM version of U-Boot (hereafter referred to as u-boot.rom) is a 67little bit tricky, as generally it requires several binary blobs which are not 68shipped in the U-Boot source tree. Due to this reason, the u-boot.rom build is 69not turned on by default in the U-Boot source tree. Firstly, you need turn it 70on by enabling the ROM build: 71 72$ export BUILD_ROM=y 73 74This tells the Makefile to build u-boot.rom as a target. 75 76--- 77 78Chromebook Link specific instructions for bare mode: 79 80First, you need the following binary blobs: 81 82* descriptor.bin - Intel flash descriptor 83* me.bin - Intel Management Engine 84* mrc.bin - Memory Reference Code, which sets up SDRAM 85* video ROM - sets up the display 86 87You can get these binary blobs by: 88 89$ git clone http://review.coreboot.org/p/blobs.git 90$ cd blobs 91 92Find the following files: 93 94* ./mainboard/google/link/descriptor.bin 95* ./mainboard/google/link/me.bin 96* ./northbridge/intel/sandybridge/systemagent-r6.bin 97 98The 3rd one should be renamed to mrc.bin. 99As for the video ROM, you can get it here [3] and rename it to vga.bin. 100Make sure all these binary blobs are put in the board directory. 101 102Now you can build U-Boot and obtain u-boot.rom: 103 104$ make chromebook_link_defconfig 105$ make all 106 107--- 108 109Chromebook Samus (2015 Pixel) instructions for bare mode: 110 111First, you need the following binary blobs: 112 113* descriptor.bin - Intel flash descriptor 114* me.bin - Intel Management Engine 115* mrc.bin - Memory Reference Code, which sets up SDRAM 116* refcode.elf - Additional Reference code 117* vga.bin - video ROM, which sets up the display 118 119If you have a samus you can obtain them from your flash, for example, in 120developer mode on the Chromebook (use Ctrl-Alt-F2 to obtain a terminal and 121log in as 'root'): 122 123 cd /tmp 124 flashrom -w samus.bin 125 scp samus.bin username@ip_address:/path/to/somewhere 126 127If not see the coreboot tree [4] where you can use: 128 129 bash crosfirmware.sh samus 130 131to get the image. There is also an 'extract_blobs.sh' scripts that you can use 132on the 'coreboot-Google_Samus.*' file to short-circuit some of the below. 133 134Then 'ifdtool -x samus.bin' on your development machine will produce: 135 136 flashregion_0_flashdescriptor.bin 137 flashregion_1_bios.bin 138 flashregion_2_intel_me.bin 139 140Rename flashregion_0_flashdescriptor.bin to descriptor.bin 141Rename flashregion_2_intel_me.bin to me.bin 142You can ignore flashregion_1_bios.bin - it is not used. 143 144To get the rest, use 'cbfstool samus.bin print': 145 146samus.bin: 8192 kB, bootblocksize 2864, romsize 8388608, offset 0x700000 147alignment: 64 bytes, architecture: x86 148 149Name Offset Type Size 150cmos_layout.bin 0x700000 cmos_layout 1164 151pci8086,0406.rom 0x7004c0 optionrom 65536 152spd.bin 0x710500 (unknown) 4096 153cpu_microcode_blob.bin 0x711540 microcode 70720 154fallback/romstage 0x722a00 stage 54210 155fallback/ramstage 0x72fe00 stage 96382 156config 0x7476c0 raw 6075 157fallback/vboot 0x748ec0 stage 15980 158fallback/refcode 0x74cd80 stage 75578 159fallback/payload 0x75f500 payload 62878 160u-boot.dtb 0x76eb00 (unknown) 5318 161(empty) 0x770000 null 196504 162mrc.bin 0x79ffc0 (unknown) 222876 163(empty) 0x7d66c0 null 167320 164 165You can extract what you need: 166 167 cbfstool samus.bin extract -n pci8086,0406.rom -f vga.bin 168 cbfstool samus.bin extract -n fallback/refcode -f refcode.rmod 169 cbfstool samus.bin extract -n mrc.bin -f mrc.bin 170 cbfstool samus.bin extract -n fallback/refcode -f refcode.bin -U 171 172Note that the -U flag is only supported by the latest cbfstool. It unpacks 173and decompresses the stage to produce a coreboot rmodule. This is a simple 174representation of an ELF file. You need the patch "Support decoding a stage 175with compression". 176 177Put all 5 files into board/google/chromebook_samus. 178 179Now you can build U-Boot and obtain u-boot.rom: 180 181$ make chromebook_link_defconfig 182$ make all 183 184If you are using em100, then this command will flash write -Boot: 185 186 em100 -s -d filename.rom -c W25Q64CV -r 187 188--- 189 190Intel Crown Bay specific instructions for bare mode: 191 192U-Boot support of Intel Crown Bay board [4] relies on a binary blob called 193Firmware Support Package [5] to perform all the necessary initialization steps 194as documented in the BIOS Writer Guide, including initialization of the CPU, 195memory controller, chipset and certain bus interfaces. 196 197Download the Intel FSP for Atom E6xx series and Platform Controller Hub EG20T, 198install it on your host and locate the FSP binary blob. Note this platform 199also requires a Chipset Micro Code (CMC) state machine binary to be present in 200the SPI flash where u-boot.rom resides, and this CMC binary blob can be found 201in this FSP package too. 202 203* ./FSP/QUEENSBAY_FSP_GOLD_001_20-DECEMBER-2013.fd 204* ./Microcode/C0_22211.BIN 205 206Rename the first one to fsp.bin and second one to cmc.bin and put them in the 207board directory. 208 209Note the FSP release version 001 has a bug which could cause random endless 210loop during the FspInit call. This bug was published by Intel although Intel 211did not describe any details. We need manually apply the patch to the FSP 212binary using any hex editor (eg: bvi). Go to the offset 0x1fcd8 of the FSP 213binary, change the following five bytes values from orginally E8 42 FF FF FF 214to B8 00 80 0B 00. 215 216As for the video ROM, you need manually extract it from the Intel provided 217BIOS for Crown Bay here [6], using the AMI MMTool [7]. Check PCI option ROM 218ID 8086:4108, extract and save it as vga.bin in the board directory. 219 220Now you can build U-Boot and obtain u-boot.rom 221 222$ make crownbay_defconfig 223$ make all 224 225--- 226 227Intel Cougar Canyon 2 specific instructions for bare mode: 228 229This uses Intel FSP for 3rd generation Intel Core and Intel Celeron processors 230with mobile Intel HM76 and QM77 chipsets platform. Download it from Intel FSP 231website and put the .fd file (CHIEFRIVER_FSP_GOLD_001_09-OCTOBER-2013.fd at the 232time of writing) in the board directory and rename it to fsp.bin. 233 234Now build U-Boot and obtain u-boot.rom 235 236$ make cougarcanyon2_defconfig 237$ make all 238 239The board has two 8MB SPI flashes mounted, which are called SPI-0 and SPI-1 in 240the board manual. The SPI-0 flash should have flash descriptor plus ME firmware 241and SPI-1 flash is used to store U-Boot. For convenience, the complete 8MB SPI-0 242flash image is included in the FSP package (named Rom00_8M_MB_PPT.bin). Program 243this image to the SPI-0 flash according to the board manual just once and we are 244all set. For programming U-Boot we just need to program SPI-1 flash. 245 246--- 247 248Intel Bay Trail based board instructions for bare mode: 249 250This uses as FSP as with Crown Bay, except it is for the Atom E3800 series. 251Two boards that use this configuration are Bayley Bay and Minnowboard MAX. 252Download this and get the .fd file (BAYTRAIL_FSP_GOLD_003_16-SEP-2014.fd at 253the time of writing). Put it in the corresponding board directory and rename 254it to fsp.bin. 255 256Obtain the VGA RAM (Vga.dat at the time of writing) and put it into the same 257board directory as vga.bin. 258 259You still need two more binary blobs. For Bayley Bay, they can be extracted 260from the sample SPI image provided in the FSP (SPI.bin at the time of writing). 261 262 $ ./tools/ifdtool -x BayleyBay/SPI.bin 263 $ cp flashregion_0_flashdescriptor.bin board/intel/bayleybay/descriptor.bin 264 $ cp flashregion_2_intel_me.bin board/intel/bayleybay/me.bin 265 266For Minnowboard MAX, we can reuse the same ME firmware above, but for flash 267descriptor, we need get that somewhere else, as the one above does not seem to 268work, probably because it is not designed for the Minnowboard MAX. Now download 269the original firmware image for this board from: 270 271http://firmware.intel.com/sites/default/files/2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip 272 273Unzip it: 274 275 $ unzip 2014-WW42.4-MinnowBoardMax.73-64-bit.bin_Release.zip 276 277Use ifdtool in the U-Boot tools directory to extract the images from that 278file, for example: 279 280 $ ./tools/ifdtool -x MNW2MAX1.X64.0073.R02.1409160934.bin 281 282This will provide the descriptor file - copy this into the correct place: 283 284 $ cp flashregion_0_flashdescriptor.bin board/intel/minnowmax/descriptor.bin 285 286Now you can build U-Boot and obtain u-boot.rom 287Note: below are examples/information for Minnowboard MAX. 288 289$ make minnowmax_defconfig 290$ make all 291 292Checksums are as follows (but note that newer versions will invalidate this): 293 294$ md5sum -b board/intel/minnowmax/*.bin 295ffda9a3b94df5b74323afb328d51e6b4 board/intel/minnowmax/descriptor.bin 29669f65b9a580246291d20d08cbef9d7c5 board/intel/minnowmax/fsp.bin 297894a97d371544ec21de9c3e8e1716c4b board/intel/minnowmax/me.bin 298a2588537da387da592a27219d56e9962 board/intel/minnowmax/vga.bin 299 300The ROM image is broken up into these parts: 301 302Offset Description Controlling config 303------------------------------------------------------------ 304000000 descriptor.bin Hard-coded to 0 in ifdtool 305001000 me.bin Set by the descriptor 306500000 <spare> 3076ef000 Environment CONFIG_ENV_OFFSET 3086f0000 MRC cache CONFIG_ENABLE_MRC_CACHE 309700000 u-boot-dtb.bin CONFIG_SYS_TEXT_BASE 310790000 vga.bin CONFIG_VGA_BIOS_ADDR 3117c0000 fsp.bin CONFIG_FSP_ADDR 3127f8000 <spare> (depends on size of fsp.bin) 3137ff800 U-Boot 16-bit boot CONFIG_SYS_X86_START16 314 315Overall ROM image size is controlled by CONFIG_ROM_SIZE. 316 317Note that the debug version of the FSP is bigger in size. If this version 318is used, CONFIG_FSP_ADDR needs to be configured to 0xfffb0000 instead of 319the default value 0xfffc0000. 320 321--- 322 323Intel Galileo instructions for bare mode: 324 325Only one binary blob is needed for Remote Management Unit (RMU) within Intel 326Quark SoC. Not like FSP, U-Boot does not call into the binary. The binary is 327needed by the Quark SoC itself. 328 329You can get the binary blob from Quark Board Support Package from Intel website: 330 331* ./QuarkSocPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin 332 333Rename the file and put it to the board directory by: 334 335 $ cp RMU.bin board/intel/galileo/rmu.bin 336 337Now you can build U-Boot and obtain u-boot.rom 338 339$ make galileo_defconfig 340$ make all 341 342--- 343 344QEMU x86 target instructions for bare mode: 345 346To build u-boot.rom for QEMU x86 targets, just simply run 347 348$ make qemu-x86_defconfig 349$ make all 350 351Note this default configuration will build a U-Boot for the QEMU x86 i440FX 352board. To build a U-Boot against QEMU x86 Q35 board, you can change the build 353configuration during the 'make menuconfig' process like below: 354 355Device Tree Control ---> 356 ... 357 (qemu-x86_q35) Default Device Tree for DT control 358 359Test with coreboot 360------------------ 361For testing U-Boot as the coreboot payload, there are things that need be paid 362attention to. coreboot supports loading an ELF executable and a 32-bit plain 363binary, as well as other supported payloads. With the default configuration, 364U-Boot is set up to use a separate Device Tree Blob (dtb). As of today, the 365generated u-boot-dtb.bin needs to be packaged by the cbfstool utility (a tool 366provided by coreboot) manually as coreboot's 'make menuconfig' does not provide 367this capability yet. The command is as follows: 368 369# in the coreboot root directory 370$ ./build/util/cbfstool/cbfstool build/coreboot.rom add-flat-binary \ 371 -f u-boot-dtb.bin -n fallback/payload -c lzma -l 0x1110000 -e 0x1110000 372 373Make sure 0x1110000 matches CONFIG_SYS_TEXT_BASE, which is the symbol address 374of _x86boot_start (in arch/x86/cpu/start.S). 375 376If you want to use ELF as the coreboot payload, change U-Boot configuration to 377use CONFIG_OF_EMBED instead of CONFIG_OF_SEPARATE. 378 379To enable video you must enable these options in coreboot: 380 381 - Set framebuffer graphics resolution (1280x1024 32k-color (1:5:5)) 382 - Keep VESA framebuffer 383 384At present it seems that for Minnowboard Max, coreboot does not pass through 385the video information correctly (it always says the resolution is 0x0). This 386works correctly for link though. 387 388Note: coreboot framebuffer driver does not work on QEMU. The reason is unknown 389at this point. Patches are welcome if you figure out anything wrong. 390 391Test with QEMU for bare mode 392---------------------------- 393QEMU is a fancy emulator that can enable us to test U-Boot without access to 394a real x86 board. Please make sure your QEMU version is 2.3.0 or above test 395U-Boot. To launch QEMU with u-boot.rom, call QEMU as follows: 396 397$ qemu-system-i386 -nographic -bios path/to/u-boot.rom 398 399This will instantiate an emulated x86 board with i440FX and PIIX chipset. QEMU 400also supports emulating an x86 board with Q35 and ICH9 based chipset, which is 401also supported by U-Boot. To instantiate such a machine, call QEMU with: 402 403$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -M q35 404 405Note by default QEMU instantiated boards only have 128 MiB system memory. But 406it is enough to have U-Boot boot and function correctly. You can increase the 407system memory by pass '-m' parameter to QEMU if you want more memory: 408 409$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 410 411This creates a board with 1 GiB system memory. Currently U-Boot for QEMU only 412supports 3 GiB maximum system memory and reserves the last 1 GiB address space 413for PCI device memory-mapped I/O and other stuff, so the maximum value of '-m' 414would be 3072. 415 416QEMU emulates a graphic card which U-Boot supports. Removing '-nographic' will 417show QEMU's VGA console window. Note this will disable QEMU's serial output. 418If you want to check both consoles, use '-serial stdio'. 419 420Multicore is also supported by QEMU via '-smp n' where n is the number of cores 421to instantiate. Note, the maximum supported CPU number in QEMU is 255. 422 423The fw_cfg interface in QEMU also provides information about kernel data, 424initrd, command-line arguments and more. U-Boot supports directly accessing 425these informtion from fw_cfg interface, which saves the time of loading them 426from hard disk or network again, through emulated devices. To use it , simply 427providing them in QEMU command line: 428 429$ qemu-system-i386 -nographic -bios path/to/u-boot.rom -m 1024 -kernel /path/to/bzImage 430 -append 'root=/dev/ram console=ttyS0' -initrd /path/to/initrd -smp 8 431 432Note: -initrd and -smp are both optional 433 434Then start QEMU, in U-Boot command line use the following U-Boot command to 435setup kernel: 436 437 => qfw 438qfw - QEMU firmware interface 439 440Usage: 441qfw <command> 442 - list : print firmware(s) currently loaded 443 - cpus : print online cpu number 444 - load <kernel addr> <initrd addr> : load kernel and initrd (if any) and setup for zboot 445 446=> qfw load 447loading kernel to address 01000000 size 5d9d30 initrd 04000000 size 1b1ab50 448 449Here the kernel (bzImage) is loaded to 01000000 and initrd is to 04000000. Then, 450'zboot' can be used to boot the kernel: 451 452=> zboot 01000000 - 04000000 1b1ab50 453 454CPU Microcode 455------------- 456Modern CPUs usually require a special bit stream called microcode [8] to be 457loaded on the processor after power up in order to function properly. U-Boot 458has already integrated these as hex dumps in the source tree. 459 460SMP Support 461----------- 462On a multicore system, U-Boot is executed on the bootstrap processor (BSP). 463Additional application processors (AP) can be brought up by U-Boot. In order to 464have an SMP kernel to discover all of the available processors, U-Boot needs to 465prepare configuration tables which contain the multi-CPUs information before 466loading the OS kernel. Currently U-Boot supports generating two types of tables 467for SMP, called Simple Firmware Interface (SFI) [9] and Multi-Processor (MP) 468[10] tables. The writing of these two tables are controlled by two Kconfig 469options GENERATE_SFI_TABLE and GENERATE_MP_TABLE. 470 471Driver Model 472------------ 473x86 has been converted to use driver model for serial, GPIO, SPI, SPI flash, 474keyboard, real-time clock, USB. Video is in progress. 475 476Device Tree 477----------- 478x86 uses device tree to configure the board thus requires CONFIG_OF_CONTROL to 479be turned on. Not every device on the board is configured via device tree, but 480more and more devices will be added as time goes by. Check out the directory 481arch/x86/dts/ for these device tree source files. 482 483Useful Commands 484--------------- 485In keeping with the U-Boot philosophy of providing functions to check and 486adjust internal settings, there are several x86-specific commands that may be 487useful: 488 489fsp - Display information about Intel Firmware Support Package (FSP). 490 This is only available on platforms which use FSP, mostly Atom. 491iod - Display I/O memory 492iow - Write I/O memory 493mtrr - List and set the Memory Type Range Registers (MTRR). These are used to 494 tell the CPU whether memory is cacheable and if so the cache write 495 mode to use. U-Boot sets up some reasonable values but you can 496 adjust then with this command. 497 498Booting Ubuntu 499-------------- 500As an example of how to set up your boot flow with U-Boot, here are 501instructions for starting Ubuntu from U-Boot. These instructions have been 502tested on Minnowboard MAX with a SATA drive but are equally applicable on 503other platforms and other media. There are really only four steps and it's a 504very simple script, but a more detailed explanation is provided here for 505completeness. 506 507Note: It is possible to set up U-Boot to boot automatically using syslinux. 508It could also use the grub.cfg file (/efi/ubuntu/grub.cfg) to obtain the 509GUID. If you figure these out, please post patches to this README. 510 511Firstly, you will need Ubuntu installed on an available disk. It should be 512possible to make U-Boot start a USB start-up disk but for now let's assume 513that you used another boot loader to install Ubuntu. 514 515Use the U-Boot command line to find the UUID of the partition you want to 516boot. For example our disk is SCSI device 0: 517 518=> part list scsi 0 519 520Partition Map for SCSI device 0 -- Partition Type: EFI 521 522 Part Start LBA End LBA Name 523 Attributes 524 Type GUID 525 Partition GUID 526 1 0x00000800 0x001007ff "" 527 attrs: 0x0000000000000000 528 type: c12a7328-f81f-11d2-ba4b-00a0c93ec93b 529 guid: 9d02e8e4-4d59-408f-a9b0-fd497bc9291c 530 2 0x00100800 0x037d8fff "" 531 attrs: 0x0000000000000000 532 type: 0fc63daf-8483-4772-8e79-3d69d8477de4 533 guid: 965c59ee-1822-4326-90d2-b02446050059 534 3 0x037d9000 0x03ba27ff "" 535 attrs: 0x0000000000000000 536 type: 0657fd6d-a4ab-43c4-84e5-0933c84b4f4f 537 guid: 2c4282bd-1e82-4bcf-a5ff-51dedbf39f17 538 => 539 540This shows that your SCSI disk has three partitions. The really long hex 541strings are called Globally Unique Identifiers (GUIDs). You can look up the 542'type' ones here [11]. On this disk the first partition is for EFI and is in 543VFAT format (DOS/Windows): 544 545 => fatls scsi 0:1 546 efi/ 547 548 0 file(s), 1 dir(s) 549 550 551Partition 2 is 'Linux filesystem data' so that will be our root disk. It is 552in ext2 format: 553 554 => ext2ls scsi 0:2 555 <DIR> 4096 . 556 <DIR> 4096 .. 557 <DIR> 16384 lost+found 558 <DIR> 4096 boot 559 <DIR> 12288 etc 560 <DIR> 4096 media 561 <DIR> 4096 bin 562 <DIR> 4096 dev 563 <DIR> 4096 home 564 <DIR> 4096 lib 565 <DIR> 4096 lib64 566 <DIR> 4096 mnt 567 <DIR> 4096 opt 568 <DIR> 4096 proc 569 <DIR> 4096 root 570 <DIR> 4096 run 571 <DIR> 12288 sbin 572 <DIR> 4096 srv 573 <DIR> 4096 sys 574 <DIR> 4096 tmp 575 <DIR> 4096 usr 576 <DIR> 4096 var 577 <SYM> 33 initrd.img 578 <SYM> 30 vmlinuz 579 <DIR> 4096 cdrom 580 <SYM> 33 initrd.img.old 581 => 582 583and if you look in the /boot directory you will see the kernel: 584 585 => ext2ls scsi 0:2 /boot 586 <DIR> 4096 . 587 <DIR> 4096 .. 588 <DIR> 4096 efi 589 <DIR> 4096 grub 590 3381262 System.map-3.13.0-32-generic 591 1162712 abi-3.13.0-32-generic 592 165611 config-3.13.0-32-generic 593 176500 memtest86+.bin 594 178176 memtest86+.elf 595 178680 memtest86+_multiboot.bin 596 5798112 vmlinuz-3.13.0-32-generic 597 165762 config-3.13.0-58-generic 598 1165129 abi-3.13.0-58-generic 599 5823136 vmlinuz-3.13.0-58-generic 600 19215259 initrd.img-3.13.0-58-generic 601 3391763 System.map-3.13.0-58-generic 602 5825048 vmlinuz-3.13.0-58-generic.efi.signed 603 28304443 initrd.img-3.13.0-32-generic 604 => 605 606The 'vmlinuz' files contain a packaged Linux kernel. The format is a kind of 607self-extracting compressed file mixed with some 'setup' configuration data. 608Despite its size (uncompressed it is >10MB) this only includes a basic set of 609device drivers, enough to boot on most hardware types. 610 611The 'initrd' files contain a RAM disk. This is something that can be loaded 612into RAM and will appear to Linux like a disk. Ubuntu uses this to hold lots 613of drivers for whatever hardware you might have. It is loaded before the 614real root disk is accessed. 615 616The numbers after the end of each file are the version. Here it is Linux 617version 3.13. You can find the source code for this in the Linux tree with 618the tag v3.13. The '.0' allows for additional Linux releases to fix problems, 619but normally this is not needed. The '-58' is used by Ubuntu. Each time they 620release a new kernel they increment this number. New Ubuntu versions might 621include kernel patches to fix reported bugs. Stable kernels can exist for 622some years so this number can get quite high. 623 624The '.efi.signed' kernel is signed for EFI's secure boot. U-Boot has its own 625secure boot mechanism - see [12] [13] and cannot read .efi files at present. 626 627To boot Ubuntu from U-Boot the steps are as follows: 628 6291. Set up the boot arguments. Use the GUID for the partition you want to 630boot: 631 632 => setenv bootargs root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro 633 634Here root= tells Linux the location of its root disk. The disk is specified 635by its GUID, using '/dev/disk/by-partuuid/', a Linux path to a 'directory' 636containing all the GUIDs Linux has found. When it starts up, there will be a 637file in that directory with this name in it. It is also possible to use a 638device name here, see later. 639 6402. Load the kernel. Since it is an ext2/4 filesystem we can do: 641 642 => ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic 643 644The address 30000000 is arbitrary, but there seem to be problems with using 645small addresses (sometimes Linux cannot find the ramdisk). This is 48MB into 646the start of RAM (which is at 0 on x86). 647 6483. Load the ramdisk (to 64MB): 649 650 => ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic 651 6524. Start up the kernel. We need to know the size of the ramdisk, but can use 653a variable for that. U-Boot sets 'filesize' to the size of the last file it 654loaded. 655 656 => zboot 03000000 0 04000000 ${filesize} 657 658Type 'help zboot' if you want to see what the arguments are. U-Boot on x86 is 659quite verbose when it boots a kernel. You should see these messages from 660U-Boot: 661 662 Valid Boot Flag 663 Setup Size = 0x00004400 664 Magic signature found 665 Using boot protocol version 2.0c 666 Linux kernel version 3.13.0-58-generic (buildd@allspice) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 667 Building boot_params at 0x00090000 668 Loading bzImage at address 100000 (5805728 bytes) 669 Magic signature found 670 Initial RAM disk at linear address 0x04000000, size 19215259 bytes 671 Kernel command line: "root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro" 672 673 Starting kernel ... 674 675U-Boot prints out some bootstage timing. This is more useful if you put the 676above commands into a script since then it will be faster. 677 678 Timer summary in microseconds: 679 Mark Elapsed Stage 680 0 0 reset 681 241,535 241,535 board_init_r 682 2,421,611 2,180,076 id=64 683 2,421,790 179 id=65 684 2,428,215 6,425 main_loop 685 48,860,584 46,432,369 start_kernel 686 687 Accumulated time: 688 240,329 ahci 689 1,422,704 vesa display 690 691Now the kernel actually starts: (if you want to examine kernel boot up message 692on the serial console, append "console=ttyS0,115200" to the kernel command line) 693 694 [ 0.000000] Initializing cgroup subsys cpuset 695 [ 0.000000] Initializing cgroup subsys cpu 696 [ 0.000000] Initializing cgroup subsys cpuacct 697 [ 0.000000] Linux version 3.13.0-58-generic (buildd@allspice) (gcc version 4.8.2 (Ubuntu 4.8.2-19ubuntu1) ) #97-Ubuntu SMP Wed Jul 8 02:56:15 UTC 2015 (Ubuntu 3.13.0-58.97-generic 3.13.11-ckt22) 698 [ 0.000000] Command line: root=/dev/disk/by-partuuid/965c59ee-1822-4326-90d2-b02446050059 ro console=ttyS0,115200 699 700It continues for a long time. Along the way you will see it pick up your 701ramdisk: 702 703 [ 0.000000] RAMDISK: [mem 0x04000000-0x05253fff] 704... 705 [ 0.788540] Trying to unpack rootfs image as initramfs... 706 [ 1.540111] Freeing initrd memory: 18768K (ffff880004000000 - ffff880005254000) 707... 708 709Later it actually starts using it: 710 711 Begin: Running /scripts/local-premount ... done. 712 713You should also see your boot disk turn up: 714 715 [ 4.357243] scsi 1:0:0:0: Direct-Access ATA ADATA SP310 5.2 PQ: 0 ANSI: 5 716 [ 4.366860] sd 1:0:0:0: [sda] 62533296 512-byte logical blocks: (32.0 GB/29.8 GiB) 717 [ 4.375677] sd 1:0:0:0: Attached scsi generic sg0 type 0 718 [ 4.381859] sd 1:0:0:0: [sda] Write Protect is off 719 [ 4.387452] sd 1:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA 720 [ 4.399535] sda: sda1 sda2 sda3 721 722Linux has found the three partitions (sda1-3). Mercifully it doesn't print out 723the GUIDs. In step 1 above we could have used: 724 725 setenv bootargs root=/dev/sda2 ro 726 727instead of the GUID. However if you add another drive to your board the 728numbering may change whereas the GUIDs will not. So if your boot partition 729becomes sdb2, it will still boot. For embedded systems where you just want to 730boot the first disk, you have that option. 731 732The last thing you will see on the console is mention of plymouth (which 733displays the Ubuntu start-up screen) and a lot of 'Starting' messages: 734 735 * Starting Mount filesystems on boot [ OK ] 736 737After a pause you should see a login screen on your display and you are done. 738 739If you want to put this in a script you can use something like this: 740 741 setenv bootargs root=UUID=b2aaf743-0418-4d90-94cc-3e6108d7d968 ro 742 setenv boot zboot 03000000 0 04000000 \${filesize} 743 setenv bootcmd "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; run boot" 744 saveenv 745 746The \ is to tell the shell not to evaluate ${filesize} as part of the setenv 747command. 748 749You can also bake this behaviour into your build by hard-coding the 750environment variables if you add this to minnowmax.h: 751 752#undef CONFIG_BOOTARGS 753#undef CONFIG_BOOTCOMMAND 754 755#define CONFIG_BOOTARGS \ 756 "root=/dev/sda2 ro" 757#define CONFIG_BOOTCOMMAND \ 758 "ext2load scsi 0:2 03000000 /boot/vmlinuz-3.13.0-58-generic; " \ 759 "ext2load scsi 0:2 04000000 /boot/initrd.img-3.13.0-58-generic; " \ 760 "run boot" 761 762#undef CONFIG_EXTRA_ENV_SETTINGS 763#define CONFIG_EXTRA_ENV_SETTINGS "boot=zboot 03000000 0 04000000 ${filesize}" 764 765Test with SeaBIOS 766----------------- 767SeaBIOS [14] is an open source implementation of a 16-bit x86 BIOS. It can run 768in an emulator or natively on x86 hardware with the use of U-Boot. With its 769help, we can boot some OSes that require 16-bit BIOS services like Windows/DOS. 770 771As U-Boot, we have to manually create a table where SeaBIOS gets various system 772information (eg: E820) from. The table unfortunately has to follow the coreboot 773table format as SeaBIOS currently supports booting as a coreboot payload. 774 775To support loading SeaBIOS, U-Boot should be built with CONFIG_SEABIOS on. 776Booting SeaBIOS is done via U-Boot's bootelf command, like below: 777 778 => tftp bios.bin.elf;bootelf 779 Using e1000#0 device 780 TFTP from server 10.10.0.100; our IP address is 10.10.0.108 781 ... 782 Bytes transferred = 122124 (1dd0c hex) 783 ## Starting application at 0x000ff06e ... 784 SeaBIOS (version rel-1.9.0) 785 ... 786 787bios.bin.elf is the SeaBIOS image built from SeaBIOS source tree. 788Make sure it is built as follows: 789 790 $ make menuconfig 791 792Inside the "General Features" menu, select "Build for coreboot" as the 793"Build Target". Inside the "Debugging" menu, turn on "Serial port debugging" 794so that we can see something as soon as SeaBIOS boots. Leave other options 795as in their default state. Then, 796 797 $ make 798 ... 799 Total size: 121888 Fixed: 66496 Free: 9184 (used 93.0% of 128KiB rom) 800 Creating out/bios.bin.elf 801 802Currently this is tested on QEMU x86 target with U-Boot chain-loading SeaBIOS 803to install/boot a Windows XP OS (below for example command to install Windows). 804 805 # Create a 10G disk.img as the virtual hard disk 806 $ qemu-img create -f qcow2 disk.img 10G 807 808 # Install a Windows XP OS from an ISO image 'winxp.iso' 809 $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -cdrom winxp.iso -smp 2 -m 512 810 811 # Boot a Windows XP OS installed on the virutal hard disk 812 $ qemu-system-i386 -serial stdio -bios u-boot.rom -hda disk.img -smp 2 -m 512 813 814This is also tested on Intel Crown Bay board with a PCIe graphics card, booting 815SeaBIOS then chain-loading a GRUB on a USB drive, then Linux kernel finally. 816 817If you are using Intel Integrated Graphics Device (IGD) as the primary display 818device on your board, SeaBIOS needs to be patched manually to get its VGA ROM 819loaded and run by SeaBIOS. SeaBIOS locates VGA ROM via the PCI expansion ROM 820register, but IGD device does not have its VGA ROM mapped by this register. 821Its VGA ROM is packaged as part of u-boot.rom at a configurable flash address 822which is unknown to SeaBIOS. An example patch is needed for SeaBIOS below: 823 824diff --git a/src/optionroms.c b/src/optionroms.c 825index 65f7fe0..c7b6f5e 100644 826--- a/src/optionroms.c 827+++ b/src/optionroms.c 828@@ -324,6 +324,8 @@ init_pcirom(struct pci_device *pci, int isvga, u64 *sources) 829 rom = deploy_romfile(file); 830 else if (RunPCIroms > 1 || (RunPCIroms == 1 && isvga)) 831 rom = map_pcirom(pci); 832+ if (pci->bdf == pci_to_bdf(0, 2, 0)) 833+ rom = (struct rom_header *)0xfff90000; 834 if (! rom) 835 // No ROM present. 836 return; 837 838Note: the patch above expects IGD device is at PCI b.d.f 0.2.0 and its VGA ROM 839is at 0xfff90000 which corresponds to CONFIG_VGA_BIOS_ADDR on Minnowboard MAX. 840Change these two accordingly if this is not the case on your board. 841 842Development Flow 843---------------- 844These notes are for those who want to port U-Boot to a new x86 platform. 845 846Since x86 CPUs boot from SPI flash, a SPI flash emulator is a good investment. 847The Dediprog em100 can be used on Linux. The em100 tool is available here: 848 849 http://review.coreboot.org/p/em100.git 850 851On Minnowboard Max the following command line can be used: 852 853 sudo em100 -s -p LOW -d u-boot.rom -c W25Q64DW -r 854 855A suitable clip for connecting over the SPI flash chip is here: 856 857 http://www.dediprog.com/pd/programmer-accessories/EM-TC-8 858 859This allows you to override the SPI flash contents for development purposes. 860Typically you can write to the em100 in around 1200ms, considerably faster 861than programming the real flash device each time. The only important 862limitation of the em100 is that it only supports SPI bus speeds up to 20MHz. 863This means that images must be set to boot with that speed. This is an 864Intel-specific feature - e.g. tools/ifttool has an option to set the SPI 865speed in the SPI descriptor region. 866 867If your chip/board uses an Intel Firmware Support Package (FSP) it is fairly 868easy to fit it in. You can follow the Minnowboard Max implementation, for 869example. Hopefully you will just need to create new files similar to those 870in arch/x86/cpu/baytrail which provide Bay Trail support. 871 872If you are not using an FSP you have more freedom and more responsibility. 873The ivybridge support works this way, although it still uses a ROM for 874graphics and still has binary blobs containing Intel code. You should aim to 875support all important peripherals on your platform including video and storage. 876Use the device tree for configuration where possible. 877 878For the microcode you can create a suitable device tree file using the 879microcode tool: 880 881 ./tools/microcode-tool -d microcode.dat -m <model> create 882 883or if you only have header files and not the full Intel microcode.dat database: 884 885 ./tools/microcode-tool -H BAY_TRAIL_FSP_KIT/Microcode/M0130673322.h \ 886 -H BAY_TRAIL_FSP_KIT/Microcode/M0130679901.h \ 887 -m all create 888 889These are written to arch/x86/dts/microcode/ by default. 890 891Note that it is possible to just add the micrcode for your CPU if you know its 892model. U-Boot prints this information when it starts 893 894 CPU: x86_64, vendor Intel, device 30673h 895 896so here we can use the M0130673322 file. 897 898If you platform can display POST codes on two little 7-segment displays on 899the board, then you can use post_code() calls from C or assembler to monitor 900boot progress. This can be good for debugging. 901 902If not, you can try to get serial working as early as possible. The early 903debug serial port may be useful here. See setup_internal_uart() for an example. 904 905During the U-Boot porting, one of the important steps is to write correct PIRQ 906routing information in the board device tree. Without it, device drivers in the 907Linux kernel won't function correctly due to interrupt is not working. Please 908refer to U-Boot doc [15] for the device tree bindings of Intel interrupt router. 909Here we have more details on the intel,pirq-routing property below. 910 911 intel,pirq-routing = < 912 PCI_BDF(0, 2, 0) INTA PIRQA 913 ... 914 >; 915 916As you see each entry has 3 cells. For the first one, we need describe all pci 917devices mounted on the board. For SoC devices, normally there is a chapter on 918the chipset datasheet which lists all the available PCI devices. For example on 919Bay Trail, this is chapter 4.3 (PCI configuration space). For the second one, we 920can get the interrupt pin either from datasheet or hardware via U-Boot shell. 921The reliable source is the hardware as sometimes chipset datasheet is not 100% 922up-to-date. Type 'pci header' plus the device's pci bus/device/function number 923from U-Boot shell below. 924 925 => pci header 0.1e.1 926 vendor ID = 0x8086 927 device ID = 0x0f08 928 ... 929 interrupt line = 0x09 930 interrupt pin = 0x04 931 ... 932 933It shows this PCI device is using INTD pin as it reports 4 in the interrupt pin 934register. Repeat this until you get interrupt pins for all the devices. The last 935cell is the PIRQ line which a particular interrupt pin is mapped to. On Intel 936chipset, the power-up default mapping is INTA/B/C/D maps to PIRQA/B/C/D. This 937can be changed by registers in LPC bridge. So far Intel FSP does not touch those 938registers so we can write down the PIRQ according to the default mapping rule. 939 940Once we get the PIRQ routing information in the device tree, the interrupt 941allocation and assignment will be done by U-Boot automatically. Now you can 942enable CONFIG_GENERATE_PIRQ_TABLE for testing Linux kernel using i8259 PIC and 943CONFIG_GENERATE_MP_TABLE for testing Linux kernel using local APIC and I/O APIC. 944 945This script might be useful. If you feed it the output of 'pci long' from 946U-Boot then it will generate a device tree fragment with the interrupt 947configuration for each device (note it needs gawk 4.0.0): 948 949 $ cat console_output |awk '/PCI/ {device=$4} /interrupt line/ {line=$4} \ 950 /interrupt pin/ {pin = $4; if (pin != "0x00" && pin != "0xff") \ 951 {patsplit(device, bdf, "[0-9a-f]+"); \ 952 printf "PCI_BDF(%d, %d, %d) INT%c PIRQ%c\n", strtonum("0x" bdf[1]), \ 953 strtonum("0x" bdf[2]), bdf[3], strtonum(pin) + 64, 64 + strtonum(pin)}}' 954 955Example output: 956 PCI_BDF(0, 2, 0) INTA PIRQA 957 PCI_BDF(0, 3, 0) INTA PIRQA 958... 959 960Porting Hints 961------------- 962 963Quark-specific considerations: 964 965To port U-Boot to other boards based on the Intel Quark SoC, a few things need 966to be taken care of. The first important part is the Memory Reference Code (MRC) 967parameters. Quark MRC supports memory-down configuration only. All these MRC 968parameters are supplied via the board device tree. To get started, first copy 969the MRC section of arch/x86/dts/galileo.dts to your board's device tree, then 970change these values by consulting board manuals or your hardware vendor. 971Available MRC parameter values are listed in include/dt-bindings/mrc/quark.h. 972The other tricky part is with PCIe. Quark SoC integrates two PCIe root ports, 973but by default they are held in reset after power on. In U-Boot, PCIe 974initialization is properly handled as per Quark's firmware writer guide. 975In your board support codes, you need provide two routines to aid PCIe 976initialization, which are board_assert_perst() and board_deassert_perst(). 977The two routines need implement a board-specific mechanism to assert/deassert 978PCIe PERST# pin. Care must be taken that in those routines that any APIs that 979may trigger PCI enumeration process are strictly forbidden, as any access to 980PCIe root port's configuration registers will cause system hang while it is 981held in reset. For more details, check how they are implemented by the Intel 982Galileo board support codes in board/intel/galileo/galileo.c. 983 984coreboot: 985 986See scripts/coreboot.sed which can assist with porting coreboot code into 987U-Boot drivers. It will not resolve all build errors, but will perform common 988transformations. Remember to add attribution to coreboot for new files added 989to U-Boot. This should go at the top of each file and list the coreboot 990filename where the code originated. 991 992Debugging ACPI issues with Windows: 993 994Windows might cache system information and only detect ACPI changes if you 995modify the ACPI table versions. So tweak them liberally when debugging ACPI 996issues with Windows. 997 998ACPI Support Status 999------------------- 1000Advanced Configuration and Power Interface (ACPI) [16] aims to establish 1001industry-standard interfaces enabling OS-directed configuration, power 1002management, and thermal management of mobile, desktop, and server platforms. 1003 1004Linux can boot without ACPI with "acpi=off" command line parameter, but 1005with ACPI the kernel gains the capabilities to handle power management. 1006For Windows, ACPI is a must-have firmware feature since Windows Vista. 1007CONFIG_GENERATE_ACPI_TABLE is the config option to turn on ACPI support in 1008U-Boot. This requires Intel ACPI compiler to be installed on your host to 1009compile ACPI DSDT table written in ASL format to AML format. You can get 1010the compiler via "apt-get install iasl" if you are on Ubuntu or download 1011the source from [17] to compile one by yourself. 1012 1013Current ACPI support in U-Boot is not complete. More features will be added 1014in the future. The status as of today is: 1015 1016 * Support generating RSDT, XSDT, FACS, FADT, MADT, MCFG tables. 1017 * Support one static DSDT table only, compiled by Intel ACPI compiler. 1018 * Support S0/S5, reboot and shutdown from OS. 1019 * Support booting a pre-installed Ubuntu distribution via 'zboot' command. 1020 * Support installing and booting Ubuntu 14.04 (or above) from U-Boot with 1021 the help of SeaBIOS using legacy interface (non-UEFI mode). 1022 * Support installing and booting Windows 8.1/10 from U-Boot with the help 1023 of SeaBIOS using legacy interface (non-UEFI mode). 1024 * Support ACPI interrupts with SCI only. 1025 1026Features not supported so far (to make it a complete ACPI solution): 1027 * S3 (Suspend to RAM), S4 (Suspend to Disk). 1028 1029Features that are optional: 1030 * Dynamic AML bytecodes insertion at run-time. We may need this to support 1031 SSDT table generation and DSDT fix up. 1032 * SMI support. Since U-Boot is a modern bootloader, we don't want to bring 1033 those legacy stuff into U-Boot. ACPI spec allows a system that does not 1034 support SMI (a legacy-free system). 1035 1036ACPI was initially enabled on BayTrail based boards. Testing was done by booting 1037a pre-installed Ubuntu 14.04 from a SATA drive. Installing Ubuntu 14.04 and 1038Windows 8.1/10 to a SATA drive and booting from there is also tested. Most 1039devices seem to work correctly and the board can respond a reboot/shutdown 1040command from the OS. 1041 1042For other platform boards, ACPI support status can be checked by examining their 1043board defconfig files to see if CONFIG_GENERATE_ACPI_TABLE is set to y. 1044 1045EFI Support 1046----------- 1047U-Boot supports booting as a 32-bit or 64-bit EFI payload, e.g. with UEFI. 1048This is enabled with CONFIG_EFI_STUB. U-Boot can also run as an EFI 1049application, with CONFIG_EFI_APP. The CONFIG_EFI_LOADER option, where U-Booot 1050provides an EFI environment to the kernel (i.e. replaces UEFI completely but 1051provides the same EFI run-time services) is not currently supported on x86. 1052 1053See README.efi for details of EFI support in U-Boot. 1054 105564-bit Support 1056-------------- 1057U-Boot supports booting a 64-bit kernel directly and is able to change to 105864-bit mode to do so. It also supports (with CONFIG_EFI_STUB) booting from 1059both 32-bit and 64-bit UEFI. However, U-Boot itself is currently always built 1060in 32-bit mode. Some access to the full memory range is provided with 1061arch_phys_memset(). 1062 1063The development work to make U-Boot itself run in 64-bit mode has not yet 1064been attempted. The best approach would likely be to build a 32-bit SPL 1065image for U-Boot, with CONFIG_SPL_BUILD. This could then handle the early CPU 1066init in 16-bit and 32-bit mode, running the FSP and any other binaries that 1067are needed. Then it could change to 64-bit model and jump to U-Boot proper. 1068 1069Given U-Boot's extensive 64-bit support this has not been a high priority, 1070but it would be a nice addition. 1071 1072TODO List 1073--------- 1074- Audio 1075- Chrome OS verified boot 1076- Support for CONFIG_EFI_LOADER 1077- Building U-Boot to run in 64-bit mode 1078 1079References 1080---------- 1081[1] http://www.coreboot.org 1082[2] http://www.qemu.org 1083[3] http://www.coreboot.org/~stepan/pci8086,0166.rom 1084[4] http://www.intel.com/content/www/us/en/embedded/design-tools/evaluation-platforms/atom-e660-eg20t-development-kit.html 1085[5] http://www.intel.com/fsp 1086[6] http://www.intel.com/content/www/us/en/secure/intelligent-systems/privileged/e6xx-35-b1-cmc22211.html 1087[7] http://www.ami.com/products/bios-uefi-tools-and-utilities/bios-uefi-utilities/ 1088[8] http://en.wikipedia.org/wiki/Microcode 1089[9] http://simplefirmware.org 1090[10] http://www.intel.com/design/archives/processors/pro/docs/242016.htm 1091[11] https://en.wikipedia.org/wiki/GUID_Partition_Table 1092[12] http://events.linuxfoundation.org/sites/events/files/slides/chromeos_and_diy_vboot_0.pdf 1093[13] http://events.linuxfoundation.org/sites/events/files/slides/elce-2014.pdf 1094[14] http://www.seabios.org/SeaBIOS 1095[15] doc/device-tree-bindings/misc/intel,irq-router.txt 1096[16] http://www.acpi.info 1097[17] https://www.acpica.org/downloads 1098