1U-Boot for UniPhier SoC family 2============================== 3 4 5Tested toolchains 6----------------- 7 8 (a) Ubuntu packages (CROSS_COMPILE=arm-linux-gnueabi-) 9 10 If you are building U-Boot on Ubuntu, its standard package is recommended. 11 You can install it as follows: 12 13 $ sudo apt-get install gcc-arm-linux-gnueabi- 14 15 (b) Linaro compilers (CROSS_COMPILE=arm-linux-gnueabihf-) 16 17 You can download pre-built toolchains from: 18 19 http://www.linaro.org/downloads/ 20 21 (c) kernel.org compilers (CROSS_COMPILE=arm-unknown-linux-gnueabi-) 22 23 You can download pre-built toolchains from: 24 25 ftp://www.kernel.org/pub/tools/crosstool/files/bin/ 26 27 28Compile the source 29------------------ 30 31PH1-sLD3: 32 $ make ph1_sld3_defconfig 33 $ make CROSS_COMPILE=arm-linux-gnueabi- 34 35PH1-LD4: 36 $ make ph1_ld4_defconfig 37 $ make CROSS_COMPILE=arm-linux-gnueabi- 38 39PH1-Pro4: 40 $ make ph1_pro4_defconfig 41 $ make CROSS_COMPILE=arm-linux-gnueabi- 42 43PH1-sLD8: 44 $ make ph1_sld8_defconfig 45 $ make CROSS_COMPILE=arm-linux-gnueabi- 46 47You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-" 48to use your favorite compiler. 49 50 51Burn U-Boot images to NAND 52-------------------------- 53 54Write two files to the NAND device as follows: 55 - spl/u-boot-spl.bin at the offset address 0x00000000 56 - u-boot-dtb.img at the offset address 0x00010000 57 58If a TFTP server is available, the images can be easily updated. 59Just copy the u-boot-spl.bin and u-boot-dtb.img to the TFTP public directory, 60and then run the following command at the U-Boot command line: 61 62 => run nandupdate 63 64 65UniPhier specific commands 66-------------------------- 67 68 - pinmon (enabled by CONFIG_CMD_PINMON) 69 shows the boot mode pins that has been latched at the power-on reset 70 71 - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP) 72 shows the DDR PHY parameters set by the PHY training 73 74 75Supported devices 76----------------- 77 78 - UART (on-chip) 79 - NAND 80 - USB 2.0 (EHCI) 81 - USB 3.0 (xHCI) 82 - LAN (on-board SMSC9118) 83 - I2C 84 - EEPROM (connected to the on-board I2C bus) 85 - Support card (SRAM, NOR flash, some peripherals) 86 87 88Micro Support Card 89------------------ 90 91The recommended bit switch settings are as follows: 92 93 SW2 OFF(1)/ON(0) Description 94 ------------------------------------------ 95 bit 1 <---- BKSZ[0] 96 bit 2 ----> BKSZ[1] 97 bit 3 <---- SoC Bus Width 16/32 98 bit 4 <---- SERIAL_SEL[0] 99 bit 5 ----> SERIAL_SEL[1] 100 bit 6 ----> BOOTSWAP_EN 101 bit 7 <---- CS1/CS5 102 bit 8 <---- SOC_SERIAL_DISABLE 103 104 SW8 OFF(1)/ON(0) Description 105 ------------------------------------------ 106 bit 1 ----> CS1_SPLIT 107 bit 2 <---- CASE9_ON 108 bit 3 <---- CASE10_ON 109 bit 4 Don't Care Reserve 110 bit 5 Don't Care Reserve 111 bit 6 Don't Care Reserve 112 bit 7 ----> BURST_EN 113 bit 8 ----> FLASHBUS32_16 114 115The BKSZ[1:0] specifies the address range of memory slot and peripherals 116as follows: 117 118 BKSZ Description RAM slot Peripherals 119 -------------------------------------------------------------------- 120 0b00 15MB RAM / 1MB Peri 00000000-0effffff 0f000000-0fffffff 121 0b01 31MB RAM / 1MB Peri 00000000-1effffff 1f000000-1fffffff 122 0b10 64MB RAM / 1MB Peri 00000000-3effffff 3f000000-3fffffff 123 0b11 127MB RAM / 1MB Peri 00000000-7effffff 7f000000-7fffffff 124 125Set BSKZ[1:0] to 0b01 for U-Boot. 126This mode is the most handy because EA[24] is always supported by the save pin 127mode of the system bus. On the other hand, EA[25] is not supported for some 128newer SoCs. Even if it is, EA[25] is not connected on most of the boards. 129 130-- 131Masahiro Yamada <yamada.masahiro@socionext.com> 132Jul. 2015 133