1U-Boot for UniPhier SoC family 2============================== 3 4 5Recommended toolchains 6---------------------- 7 8The UniPhier platform is well tested with Linaro toolchains. 9You can download pre-built toolchains from: 10 11 http://www.linaro.org/downloads/ 12 13 14Compile the source 15------------------ 16 17The source can be configured and built with the following commands: 18 19 $ make <defconfig> 20 $ make CROSS_COMPILE=<toolchain-prefix> DEVICE_TREE=<device-tree> 21 22The recommended <toolchain-prefix> is `arm-linux-gnueabihf-` for 32bit SoCs, 23`aarch64-linux-gnu-` for 64bit SoCs, but you may wish to change it to use your 24favorite compiler. 25 26The following tables show <defconfig> and <device-tree> for each board. 27 2832bit SoC boards: 29 30 Board | <defconfig> | <device-tree> 31---------------|------------------------------|------------------------------ 32sLD3 reference | uniphier_sld3_defconfig | uniphier-sld3-ref (default) 33LD4 reference | uniphier_ld4_sld8_defconfig | uniphier-ld4-ref (default) 34sld8 reference | uniphier_ld4_sld8_defconfig | uniphier-sld8-def 35Pro4 reference | uniphier_pro4_defconfig | uniphier-pro4-ref (default) 36Pro4 Ace | uniphier_pro4_defconfig | uniphier-pro4-ace 37Pro4 Sanji | uniphier_pro4_defconfig | uniphier-pro4-sanji 38Pro5 4KBOX | uniphier_pxs2_ld6b_defconfig | uniphier-pro5-4kbox 39PXs2 Gentil | uniphier_pxs2_ld6b_defconfig | uniphier-pxs2-gentil 40PXs2 Vodka | uniphier_pxs2_ld6b_defconfig | uniphier-pxs2-vodka (default) 41LD6b reference | uniphier_pxs2_ld6b_defconfig | uniphier-ld6b-ref 42 4364bit SoC boards: 44 45 Board | <defconfig> | <device-tree> 46---------------|-----------------------|---------------------------- 47LD11 reference | uniphier_v8_defconfig | uniphier-ld11-ref 48LD11 Global | uniphier_v8_defconfig | uniphier-ld11-global 49LD20 reference | uniphier_v8_defconfig | uniphier-ld20-ref (default) 50LD20 Global | uniphier_v8_defconfig | uniphier-ld20-global 51 52For example, to compile the source for PXs2 Vodka board, run the following: 53 54 $ make uniphier_pxs2_ld6b_defconfig 55 $ make CROSS_COMPILE=arm-linux-gnueabihf- DEVICE_TREE=uniphier-pxs2-vodka 56 57The device tree marked as (default) can be omitted. `uniphier-pxs2-vodka` is 58the default device tree for the configuration `uniphier_pxs2_ld6b_defconfig`, 59so the following gives the same result. 60 61 $ make uniphier_pxs2_ld6b_defconfig 62 $ make CROSS_COMPILE=arm-linux-gnueabihf- 63 64 65Booting 32bit SoC boards 66------------------------ 67 68The build command will generate the following: 69- u-boot.bin 70- spl/u-boot.bin 71 72U-Boot can boot UniPhier 32bit SoC boards by itself. Flash the generated images 73to the storage device (NAND or eMMC) on your board. 74 75 - spl/u-boot-spl.bin at the offset address 0x00000000 76 - u-boot.bin at the offset address 0x00020000 77 78The `u-boot-with-spl.bin` is the concatenation of the two (with appropriate 79padding), so you can also do: 80 81 - u-boot-with-spl.bin at the offset address 0x00000000 82 83If a TFTP server is available, the images can be easily updated. 84Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory, 85and run the following command at the U-Boot command line: 86 87To update the images in NAND: 88 89 => run nandupdate 90 91To update the images in eMMC: 92 93 => run emmcupdate 94 95 96Booting 64bit SoC boards 97------------------------ 98 99The build command will generate the following: 100- u-boot.bin 101 102However, U-Boot is not the first stage loader for UniPhier 64bit SoC boards. 103U-Boot serves as a non-secure boot loader loaded by [ARM Trusted Firmware], 104so you need to provide the `u-boot.bin` to the build command of ARM Trusted 105Firmware. 106 107[ARM Trusted Firmware]: https://github.com/ARM-software/arm-trusted-firmware 108 109 110UniPhier specific commands 111-------------------------- 112 113 - pinmon (enabled by CONFIG_CMD_PINMON) 114 shows the boot mode pins that has been latched at the power-on reset 115 116 - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP) 117 shows the DDR PHY parameters set by the PHY training 118 119 - ddrmphy (enabled by CONFIG_CMD_DDRMPHY_DUMP) 120 shows the DDR Multi PHY parameters set by the PHY training 121 122 123Supported devices 124----------------- 125 126 - UART (on-chip) 127 - NAND 128 - SD/eMMC 129 - USB 2.0 (EHCI) 130 - USB 3.0 (xHCI) 131 - GPIO 132 - LAN (on-board SMSC9118) 133 - I2C 134 - EEPROM (connected to the on-board I2C bus) 135 - Support card (SRAM, NOR flash, some peripherals) 136 137 138Micro Support Card 139------------------ 140 141The recommended bit switch settings are as follows: 142 143 SW2 OFF(1)/ON(0) Description 144 ------------------------------------------ 145 bit 1 <---- BKSZ[0] 146 bit 2 ----> BKSZ[1] 147 bit 3 <---- SoC Bus Width 16/32 148 bit 4 <---- SERIAL_SEL[0] 149 bit 5 ----> SERIAL_SEL[1] 150 bit 6 ----> BOOTSWAP_EN 151 bit 7 <---- CS1/CS5 152 bit 8 <---- SOC_SERIAL_DISABLE 153 154 SW8 OFF(1)/ON(0) Description 155 ------------------------------------------ 156 bit 1 <---- CS1_SPLIT 157 bit 2 <---- CASE9_ON 158 bit 3 <---- CASE10_ON 159 bit 4 Don't Care Reserve 160 bit 5 Don't Care Reserve 161 bit 6 Don't Care Reserve 162 bit 7 ----> BURST_EN 163 bit 8 ----> FLASHBUS32_16 164 165The BKSZ[1:0] specifies the address range of memory slot and peripherals 166as follows: 167 168 BKSZ Description RAM slot Peripherals 169 -------------------------------------------------------------------- 170 0b00 15MB RAM / 1MB Peri 00000000-00efffff 00f00000-00ffffff 171 0b01 31MB RAM / 1MB Peri 00000000-01efffff 01f00000-01ffffff 172 0b10 64MB RAM / 1MB Peri 00000000-03efffff 03f00000-03ffffff 173 0b11 127MB RAM / 1MB Peri 00000000-07efffff 07f00000-07ffffff 174 175Set BSKZ[1:0] to 0b01 for U-Boot. 176This mode is the most handy because EA[24] is always supported by the save pin 177mode of the system bus. On the other hand, EA[25] is not supported for some 178newer SoCs. Even if it is, EA[25] is not connected on most of the boards. 179 180-- 181Masahiro Yamada <yamada.masahiro@socionext.com> 182Jul. 2017 183