xref: /openbmc/u-boot/doc/README.uniphier (revision 0f67e239)
1U-Boot for UniPhier SoC family
2==============================
3
4
5Tested toolchains
6-----------------
7
8 (a) Ubuntu packages  (CROSS_COMPILE=arm-linux-gnueabi-)
9
10  If you are building U-Boot on Ubuntu, its standard package is recommended.
11  You can install it as follows:
12
13    $ sudo apt-get install gcc-arm-linux-gnueabi-
14
15 (b) Linaro compilers  (CROSS_COMPILE=arm-linux-gnueabihf-)
16
17  You can download pre-built toolchains from:
18
19    http://www.linaro.org/downloads/
20
21 (c) kernel.org compilers  (CROSS_COMPILE=arm-unknown-linux-gnueabi-)
22
23  You can download pre-built toolchains from:
24
25    ftp://www.kernel.org/pub/tools/crosstool/files/bin/
26
27
28Compile the source
29------------------
30
31PH1-sLD3 reference board:
32    $ make uniphier_sld3_defconfig
33    $ make CROSS_COMPILE=arm-linux-gnueabi-
34
35PH1-LD4 reference board:
36    $ make uniphier_ld4_sld8_defconfig
37    $ make CROSS_COMPILE=arm-linux-gnueabi-
38
39PH1-sLD8 reference board:
40    $ make uniphier_ld4_sld8_defconfig
41    $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-sld8-ref
42
43PH1-Pro4 reference board:
44    $ make uniphier_pro4_defconfig
45    $ make CROSS_COMPILE=arm-linux-gnueabi-
46
47PH1-Pro4 Ace board:
48    $ make uniphier_pro4_defconfig
49    $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-ace
50
51PH1-Pro4 Sanji board:
52    $ make uniphier_pro4_defconfig
53    $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro4-sanji
54
55PH1-Pro5 4KBOX Board:
56    $ make uniphier_pxs2_ld6b_defconfig
57    $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-pro5-4kbox
58
59ProXstream2 Gentil board:
60    $ make uniphier_pxs2_ld6b_defconfig
61    $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-proxstream2-gentil
62
63ProXstream2 Vodka board:
64    $ make uniphier_pxs2_ld6b_defconfig
65    $ make CROSS_COMPILE=arm-linux-gnueabi-
66
67PH1-LD6b reference board:
68    $ make uniphier_pxs2_ld6b_defconfig
69    $ make CROSS_COMPILE=arm-linux-gnueabi- DEVICE_TREE=uniphier-ph1-ld6b-ref
70
71You may wish to change the "CROSS_COMPILE=arm-linux-gnueabi-"
72to use your favorite compiler.
73
74
75Burn U-Boot images to NAND
76--------------------------
77
78Write the following to the NAND device:
79
80 - spl/u-boot-spl.bin at the offset address 0x00000000
81 - u-boot.bin         at the offset address 0x00010000
82
83or
84
85 - u-boot-with-spl.bin at the offset address 0x00000000
86
87If a TFTP server is available, the images can be easily updated.
88Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
89and then run the following command at the U-Boot command line:
90
91  => run nandupdate
92
93
94Burn U-Boot images to eMMC
95--------------------------
96
97Write the following to the Boot partition 1 of the eMMC device:
98
99 - spl/u-boot-spl.bin at the offset address 0x00000000
100 - u-boot.bin         at the offset address 0x00010000
101
102or
103
104 - u-boot-with-spl.bin at the offset address 0x00000000
105
106If a TFTP server is available, the images can be easily updated.
107Just copy the u-boot-spl.bin and u-boot.bin to the TFTP public directory,
108and then run the following command at the U-Boot command line:
109
110  => run emmcupdate
111
112
113UniPhier specific commands
114--------------------------
115
116 - pinmon (enabled by CONFIG_CMD_PINMON)
117     shows the boot mode pins that has been latched at the power-on reset
118
119 - ddrphy (enabled by CONFIG_CMD_DDRPHY_DUMP)
120     shows the DDR PHY parameters set by the PHY training
121
122
123Supported devices
124-----------------
125
126 - UART (on-chip)
127 - NAND
128 - SD/eMMC
129 - USB 2.0 (EHCI)
130 - USB 3.0 (xHCI)
131 - GPIO
132 - LAN (on-board SMSC9118)
133 - I2C
134 - EEPROM (connected to the on-board I2C bus)
135 - Support card (SRAM, NOR flash, some peripherals)
136
137
138Micro Support Card
139------------------
140
141The recommended bit switch settings are as follows:
142
143 SW2    OFF(1)/ON(0)   Description
144 ------------------------------------------
145 bit 1   <----         BKSZ[0]
146 bit 2   ---->         BKSZ[1]
147 bit 3   <----         SoC Bus Width 16/32
148 bit 4   <----         SERIAL_SEL[0]
149 bit 5   ---->         SERIAL_SEL[1]
150 bit 6   ---->         BOOTSWAP_EN
151 bit 7   <----         CS1/CS5
152 bit 8   <----         SOC_SERIAL_DISABLE
153
154 SW8    OFF(1)/ON(0)   Description
155 ------------------------------------------
156 bit 1    <----        CS1_SPLIT
157 bit 2    <----        CASE9_ON
158 bit 3    <----        CASE10_ON
159 bit 4  Don't Care     Reserve
160 bit 5  Don't Care     Reserve
161 bit 6  Don't Care     Reserve
162 bit 7    ---->        BURST_EN
163 bit 8    ---->        FLASHBUS32_16
164
165The BKSZ[1:0] specifies the address range of memory slot and peripherals
166as follows:
167
168 BKSZ    Description              RAM slot            Peripherals
169 --------------------------------------------------------------------
170 0b00   15MB RAM / 1MB Peri    00000000-00efffff    00f00000-00ffffff
171 0b01   31MB RAM / 1MB Peri    00000000-01efffff    01f00000-01ffffff
172 0b10   64MB RAM / 1MB Peri    00000000-03efffff    03f00000-03ffffff
173 0b11  127MB RAM / 1MB Peri    00000000-07efffff    07f00000-07ffffff
174
175Set BSKZ[1:0] to 0b01 for U-Boot.
176This mode is the most handy because EA[24] is always supported by the save pin
177mode of the system bus.  On the other hand, EA[25] is not supported for some
178newer SoCs.  Even if it is, EA[25] is not connected on most of the boards.
179
180--
181Masahiro Yamada <yamada.masahiro@socionext.com>
182Feb. 2016
183