1# 2# Copyright (C) 2015 Google. Inc 3# Written by Simon Glass <sjg@chromium.org> 4# 5# SPDX-License-Identifier: GPL-2.0+ 6# 7 8U-Boot on Rockchip 9================== 10 11There are several repositories available with versions of U-Boot that support 12many Rockchip devices [1] [2]. 13 14The current mainline support is experimental only and is not useful for 15anything. It should provide a base on which to build. 16 17So far only support for the RK3288 is provided. 18 19 20Prerequisites 21============= 22 23You will need: 24 25 - Firefly RK3288 baord 26 - Power connection to 5V using the supplied micro-USB power cable 27 - Separate USB serial cable attached to your computer and the Firefly 28 (connect to the micro-USB connector below the logo) 29 - rkflashtool [3] 30 - openssl (sudo apt-get install openssl) 31 - Serial UART connection [4] 32 - Suitable ARM cross compiler, e.g.: 33 sudo apt-get install gcc-4.7-arm-linux-gnueabi 34 35 36Building 37======== 38 39At present three RK3288 boards are supported: 40 41 - Firefly RK3288 - use firefly-rk3288 configuration 42 - Radxa Rock 2 - also uses firefly-rk3288 configuration 43 - Haier Chromebook - use chromebook_jerry configuration 44 45one RK3036 board is support: 46 47 - EVB RK3036 - use evb-rk3036_defconfig configuration 48 49For example: 50 51 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all 52 53(or you can use another cross compiler if you prefer) 54 55Note that the Radxa Rock 2 uses the Firefly configuration for now as 56device tree files are not yet available for the Rock 2. Clearly the two 57have hardware differences, so this approach will break down as more drivers 58are added. 59 60 61Writing to the board with USB 62============================= 63 64For USB to work you must get your board into ROM boot mode, either by erasing 65your MMC or (perhaps) holding the recovery button when you boot the board. 66To erase your MMC, you can boot into Linux and type (as root) 67 68 dd if=/dev/zero of=/dev/mmcblk0 bs=1M 69 70Connect your board's OTG port to your computer. 71 72To create a suitable image and write it to the board: 73 74 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \ 75 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ 76 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l 77 78If all goes well you should something like: 79 80 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49) 81 Card did not respond to voltage select! 82 spl: mmc init failed with error: -17 83 ### ERROR ### Please RESET the board ### 84 85You will need to reset the board before each time you try. Yes, that's all 86it does so far. If support for the Rockchip USB protocol or DFU were added 87in SPL then we could in principle load U-Boot and boot to a prompt from USB 88as several other platforms do. However it does not seem to be possible to 89use the existing boot ROM code from SPL. 90 91 92Booting from an SD card 93======================= 94 95To write an image that boots from an SD card (assumed to be /dev/sdc): 96 97 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ 98 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ 99 sudo dd if=out of=/dev/sdc seek=64 && \ 100 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256 101 102This puts the Rockchip header and SPL image first and then places the U-Boot 103image at block 256 (i.e. 128KB from the start of the SD card). This 104corresponds with this setting in U-Boot: 105 106 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 107 108Put this SD (or micro-SD) card into your board and reset it. You should see 109something like: 110 111 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40) 112 113 114 U-Boot 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40) 115 116 DRAM: 2 GiB 117 MMC: 118 Using default environment 119 120 In: serial@ff690000 121 Out: serial@ff690000 122 Err: serial@ff690000 123 => 124 125For evb_rk3036 board: 126 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \ 127 cat evb-rk3036/u-boot-dtb.bin >> out && \ 128 sudo dd if=out of=/dev/sdc seek=64 129 130Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the 131 debug uart must be disabled 132 133Booting from SPI 134================ 135 136To write an image that boots from SPI flash (e.g. for the Haier Chromebook): 137 138 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ 139 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ 140 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \ 141 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \ 142 dd if=out.bin of=out.bin.pad bs=4M conv=sync 143 144This converts the SPL image to the required SPI format by adding the Rockchip 145header and skipping every 2KB block. Then the U-Boot image is written at 146offset 128KB and the whole image is padded to 4MB which is the SPI flash size. 147The position of U-Boot is controlled with this setting in U-Boot: 148 149 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 150 151If you have a Dediprog em100pro connected then you can write the image with: 152 153 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r 154 155When booting you should see something like: 156 157 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32) 158 159 160 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600) 161 162 Model: Google Jerry 163 DRAM: 2 GiB 164 MMC: 165 Using default environment 166 167 In: serial@ff690000 168 Out: serial@ff690000 169 Err: serial@ff690000 170 => 171 172 173Future work 174=========== 175 176Immediate priorities are: 177 178- GPIO (driver exists but is lightly tested) 179- I2C (driver exists but is non-functional) 180- USB host 181- USB device 182- PMIC and regulators (only ACT8846 is supported at present) 183- LCD and HDMI 184- Run CPU at full speed 185- Ethernet 186- NAND flash 187- Support for other Rockchip parts 188- Boot U-Boot proper over USB OTG (at present only SPL works) 189 190 191Development Notes 192================= 193 194There are plenty of patches in the links below to help with this work. 195 196[1] https://github.com/rkchrome/uboot.git 197[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288 198[3] https://github.com/linux-rockchip/rkflashtool.git 199[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en 200 201rkimage 202------- 203 204rkimage.c produces an SPL image suitable for sending directly to the boot ROM 205over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes) 206followed by u-boot-spl-dtb.bin. 207 208The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM 209starts at 0xff700000 and extends to 0xff718000 where we put the stack. 210 211rksd 212---- 213 214rksd.c produces an image consisting of 32KB of empty space, a header and 215u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although 216most of the fields are unused by U-Boot. We just need to specify the 217signature, a flag and the block offset and size of the SPL image. 218 219The header occupies a single block but we pad it out to 4 blocks. The header 220is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL 221image can be encoded too but we don't do that. 222 223The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB, 224or 0x40 blocks. This is a severe and annoying limitation. There may be a way 225around this limitation, since there is plenty of SRAM, but at present the 226board refuses to boot if this limit is exceeded. 227 228The image produced is padded up to a block boundary (512 bytes). It should be 229written to the start of an SD card using dd. 230 231Since this image is set to load U-Boot from the SD card at block offset, 232CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write 233u-boot-dtb.img to the SD card at that offset. See above for instructions. 234 235rkspi 236----- 237 238rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The 239resulting image is then spread out so that only the first 2KB of each 4KB 240sector is used. The header is the same as with rksd and the maximum size is 241also 32KB (before spreading). The image should be written to the start of 242SPI flash. 243 244See above for instructions on how to write a SPI image. 245 246 247Device tree and driver model 248---------------------------- 249 250Where possible driver model is used to provide a structure to the 251functionality. Device tree is used for configuration. However these have an 252overhead and in SPL with a 32KB size limit some shortcuts have been taken. 253In general all Rockchip drivers should use these features, with SPL-specific 254modifications where required. 255 256 257-- 258Simon Glass <sjg@chromium.org> 25924 June 2015 260