1# 2# Copyright (C) 2015 Google. Inc 3# Written by Simon Glass <sjg@chromium.org> 4# 5# SPDX-License-Identifier: GPL-2.0+ 6# 7 8U-Boot on Rockchip 9================== 10 11There are several repositories available with versions of U-Boot that support 12many Rockchip devices [1] [2]. 13 14The current mainline support is experimental only and is not useful for 15anything. It should provide a base on which to build. 16 17So far only support for the RK3288 and RK3036 is provided. 18 19 20Prerequisites 21============= 22 23You will need: 24 25 - Firefly RK3288 board or something else with a supported RockChip SoC 26 - Power connection to 5V using the supplied micro-USB power cable 27 - Separate USB serial cable attached to your computer and the Firefly 28 (connect to the micro-USB connector below the logo) 29 - rkflashtool [3] 30 - openssl (sudo apt-get install openssl) 31 - Serial UART connection [4] 32 - Suitable ARM cross compiler, e.g.: 33 sudo apt-get install gcc-4.7-arm-linux-gnueabi 34 35 36Building 37======== 38 39At present seven RK3288 boards are supported: 40 41 - EVB RK3288 - use evb-rk3288 configuration 42 - Fennec RK3288 - use fennec-rk3288 configuration 43 - Firefly RK3288 - use firefly-rk3288 configuration 44 - Hisense Chromebook - use chromebook_jerry configuration 45 - Miniarm RK3288 - use miniarm-rk3288 configuration 46 - PopMetal RK3288 - use popmetal-rk3288 configuration 47 - Radxa Rock 2 - use rock2 configuration 48 49Two RK3036 board are supported: 50 51 - EVB RK3036 - use evb-rk3036 configuration 52 - Kylin - use kylin_rk3036 configuration 53 54For example: 55 56 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all 57 58(or you can use another cross compiler if you prefer) 59 60 61Writing to the board with USB 62============================= 63 64For USB to work you must get your board into ROM boot mode, either by erasing 65your MMC or (perhaps) holding the recovery button when you boot the board. 66To erase your MMC, you can boot into Linux and type (as root) 67 68 dd if=/dev/zero of=/dev/mmcblk0 bs=1M 69 70Connect your board's OTG port to your computer. 71 72To create a suitable image and write it to the board: 73 74 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \ 75 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ 76 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l 77 78If all goes well you should something like: 79 80 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49) 81 Card did not respond to voltage select! 82 spl: mmc init failed with error: -17 83 ### ERROR ### Please RESET the board ### 84 85You will need to reset the board before each time you try. Yes, that's all 86it does so far. If support for the Rockchip USB protocol or DFU were added 87in SPL then we could in principle load U-Boot and boot to a prompt from USB 88as several other platforms do. However it does not seem to be possible to 89use the existing boot ROM code from SPL. 90 91 92Booting from an SD card 93======================= 94 95To write an image that boots from an SD card (assumed to be /dev/sdc): 96 97 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ 98 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ 99 sudo dd if=out of=/dev/sdc seek=64 && \ 100 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256 101 102This puts the Rockchip header and SPL image first and then places the U-Boot 103image at block 256 (i.e. 128KB from the start of the SD card). This 104corresponds with this setting in U-Boot: 105 106 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256 107 108Put this SD (or micro-SD) card into your board and reset it. You should see 109something like: 110 111 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700) 112 113 Model: Radxa Rock 2 Square 114 DRAM: 2 GiB 115 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1 116 *** Warning - bad CRC, using default environment 117 118 In: serial 119 Out: vop@ff940000.vidconsole 120 Err: serial 121 Net: Net Initialization Skipped 122 No ethernet found. 123 Hit any key to stop autoboot: 0 124 => 125 126The rockchip bootrom can load and boot an initial spl, then continue to 127load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom. 128Therefore RK3288 has another loading sequence like RK3036. The option of 129U-Boot is controlled with this setting in U-Boot: 130 131 #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM 132 133You can create the image via the following operations: 134 135 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \ 136 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \ 137 cat firefly-rk3288/u-boot-dtb.bin >> out && \ 138 sudo dd if=out of=/dev/sdc seek=64 139 140If you have an HDMI cable attached you should see a video console. 141 142For evb_rk3036 board: 143 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \ 144 cat evb-rk3036/u-boot-dtb.bin >> out && \ 145 sudo dd if=out of=/dev/sdc seek=64 146 147Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the 148 debug uart must be disabled 149 150Using fastboot on rk3288 151======================== 152- Define GPT partition layout like kylin_rk3036(see include/configs/kylin_rk3036.h) 153- Write GPT partition layout to mmc device which fastboot want to use it to 154store the image 155 156 => gpt write mmc 1 $partitions 157 158- Invoke fastboot command to prepare 159 160 => fastboot 1 161 162- Start fastboot request on PC 163 164 fastboot -i 0x2207 flash loader evb-rk3288/spl/u-boot-spl-dtb.bin 165 166You should see something like: 167 168 => fastboot 1 169 WARNING: unknown variable: partition-type:loader 170 Starting download of 357796 bytes 171 .. 172 downloading of 357796 bytes finished 173 Flashing Raw Image 174 ........ wrote 357888 bytes to 'loader' 175 176Booting from SPI 177================ 178 179To write an image that boots from SPI flash (e.g. for the Haier Chromebook): 180 181 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \ 182 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \ 183 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \ 184 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \ 185 dd if=out.bin of=out.bin.pad bs=4M conv=sync 186 187This converts the SPL image to the required SPI format by adding the Rockchip 188header and skipping every 2KB block. Then the U-Boot image is written at 189offset 128KB and the whole image is padded to 4MB which is the SPI flash size. 190The position of U-Boot is controlled with this setting in U-Boot: 191 192 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10) 193 194If you have a Dediprog em100pro connected then you can write the image with: 195 196 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r 197 198When booting you should see something like: 199 200 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32) 201 202 203 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600) 204 205 Model: Google Jerry 206 DRAM: 2 GiB 207 MMC: 208 Using default environment 209 210 In: serial@ff690000 211 Out: serial@ff690000 212 Err: serial@ff690000 213 => 214 215 216Future work 217=========== 218 219Immediate priorities are: 220 221- USB host 222- USB device 223- Run CPU at full speed (code exists but we only see ~60 DMIPS maximum) 224- Ethernet 225- NAND flash 226- Support for other Rockchip parts 227- Boot U-Boot proper over USB OTG (at present only SPL works) 228 229 230Development Notes 231================= 232 233There are plenty of patches in the links below to help with this work. 234 235[1] https://github.com/rkchrome/uboot.git 236[2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288 237[3] https://github.com/linux-rockchip/rkflashtool.git 238[4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en 239 240rkimage 241------- 242 243rkimage.c produces an SPL image suitable for sending directly to the boot ROM 244over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes) 245followed by u-boot-spl-dtb.bin. 246 247The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM 248starts at 0xff700000 and extends to 0xff718000 where we put the stack. 249 250rksd 251---- 252 253rksd.c produces an image consisting of 32KB of empty space, a header and 254u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although 255most of the fields are unused by U-Boot. We just need to specify the 256signature, a flag and the block offset and size of the SPL image. 257 258The header occupies a single block but we pad it out to 4 blocks. The header 259is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL 260image can be encoded too but we don't do that. 261 262The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB, 263or 0x40 blocks. This is a severe and annoying limitation. There may be a way 264around this limitation, since there is plenty of SRAM, but at present the 265board refuses to boot if this limit is exceeded. 266 267The image produced is padded up to a block boundary (512 bytes). It should be 268written to the start of an SD card using dd. 269 270Since this image is set to load U-Boot from the SD card at block offset, 271CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write 272u-boot-dtb.img to the SD card at that offset. See above for instructions. 273 274rkspi 275----- 276 277rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The 278resulting image is then spread out so that only the first 2KB of each 4KB 279sector is used. The header is the same as with rksd and the maximum size is 280also 32KB (before spreading). The image should be written to the start of 281SPI flash. 282 283See above for instructions on how to write a SPI image. 284 285rkmux.py 286-------- 287 288You can use this script to create #defines for SoC register access. See the 289script for usage. 290 291 292Device tree and driver model 293---------------------------- 294 295Where possible driver model is used to provide a structure to the 296functionality. Device tree is used for configuration. However these have an 297overhead and in SPL with a 32KB size limit some shortcuts have been taken. 298In general all Rockchip drivers should use these features, with SPL-specific 299modifications where required. 300 301 302-- 303Simon Glass <sjg@chromium.org> 30424 June 2015 305