xref: /openbmc/u-boot/doc/README.omap3 (revision 7b384eccc785b596f68448b155cbda26df57fb23)
1 
2 Summary
3 =======
4 
5 This README is about U-Boot support for TI's ARM Cortex-A8 based OMAP3 [1]
6 family of SoCs. TI's OMAP3 SoC family contains an ARM Cortex-A8. Additionally,
7 some family members contain a TMS320C64x+ DSP and/or an Imagination SGX 2D/3D
8 graphics processor and various other standard peripherals.
9 
10 Currently the following boards are supported:
11 
12 * OMAP3530 BeagleBoard [2]
13 
14 * Gumstix Overo [3]
15 
16 * TI EVM [4]
17 
18 * OpenPandora Ltd. Pandora [5]
19 
20 * TI/Logic PD Zoom MDK [6]
21 
22 * TI/Logic PD Zoom 2 [7]
23 
24 * CompuLab Ltd. CM-T35 [8]
25 
26 Toolchain
27 =========
28 
29 While ARM Cortex-A8 support ARM v7 instruction set (-march=armv7a) we compile
30 with -march=armv5 to allow more compilers to work. For U-Boot code this has
31 no performance impact.
32 
33 Build
34 =====
35 
36 * BeagleBoard:
37 
38 make omap3_beagle_config
39 make
40 
41 * Gumstix Overo:
42 
43 make omap3_overo_config
44 make
45 
46 * TI EVM:
47 
48 make omap3_evm_config
49 make
50 
51 * Pandora:
52 
53 make omap3_pandora_config
54 make
55 
56 * Zoom MDK:
57 
58 make omap3_zoom1_config
59 make
60 
61 * Zoom 2:
62 
63 make omap3_zoom2_config
64 make
65 
66 * CM-T35:
67 
68 make cm_t35_config
69 make
70 
71 
72 Custom commands
73 ===============
74 
75 To make U-Boot for OMAP3 support NAND device SW or HW ECC calculation, U-Boot
76 for OMAP3 supports custom user command
77 
78 nandecc hw/sw
79 
80 To be compatible with NAND drivers using SW ECC (e.g. kernel code)
81 
82 nandecc sw
83 
84 enables SW ECC calculation. HW ECC enabled with
85 
86 nandecc hw
87 
88 is typically used to write 2nd stage bootloader (known as 'x-loader') which is
89 executed by OMAP3's boot rom and therefore has to be written with HW ECC.
90 
91 For all other commands see
92 
93 help
94 
95 Interfaces
96 ==========
97 
98 gpio
99 ----
100 
101 To set a bit :
102 
103 	if (!gpio_request(N, "")) {
104 		gpio_direction_output(N, 0);
105 		gpio_set_value(N, 1);
106 	}
107 
108 To clear a bit :
109 
110 	if (!gpio_request(N, "")) {
111 		gpio_direction_output(N, 0);
112 		gpio_set_value(N, 0);
113 	}
114 
115 To read a bit :
116 
117 	if (!gpio_request(N, "")) {
118 		gpio_direction_input(N);
119 		val = gpio_get_value(N);
120 		gpio_free(N);
121 	}
122 	if (val)
123 		printf("GPIO N is set\n");
124 	else
125 		printf("GPIO N is clear\n");
126 
127 dma
128 ---
129 void omap3_dma_init(void)
130 	Init the DMA module
131 int omap3_dma_get_conf_chan(uint32_t chan, struct dma4_chan *config);
132 	Read config of the channel
133 int omap3_dma_conf_chan(uint32_t chan, struct dma4_chan *config);
134 	Write config to the channel
135 int omap3_dma_conf_transfer(uint32_t chan, uint32_t *src, uint32_t *dst,
136 		uint32_t sze)
137 	Config source, destination and size of a transfer
138 int omap3_dma_wait_for_transfer(uint32_t chan)
139 	Wait for a transfer to end - this hast to be called before a channel
140 	or the data the channel transferd are used.
141 int omap3_dma_get_revision(uint32_t *minor, uint32_t *major)
142 	Read silicon Revision of the DMA module
143 
144 NAND
145 ====
146 
147 There are some OMAP3 devices out there with NAND attached. Due to the fact that
148 OMAP3 ROM code can only handle 1-bit hamming ECC for accessing first page
149 (place where SPL lives) we require this setup for u-boot at least when reading
150 the second progam within SPL.  A lot of newer NAND chips however require more
151 than 1-bit ECC for the pages, some can live with 1-bit for the first page. To
152 handle this we can switch to another ECC algorithm after reading the payload
153 within SPL.
154 
155 BCH8
156 ----
157 
158 To enable hardware assisted BCH8 (8-bit BCH [Bose, Chaudhuri, Hocquenghem]) on
159 OMAP3 devices we can use the BCH library in lib/bch.c. To do so add CONFIG_BCH
160 and set CONFIG_NAND_OMAP_ECCSCHEME=5 (refer README.nand) for selecting BCH8_SW.
161 The NAND OOB layout is the same as in linux kernel, if the linux kernel BCH8
162 implementation for OMAP3 works for you so the u-boot version should also.
163 When you require the SPL to read with BCH8 there are two more configs to
164 change:
165 
166  * CONFIG_SYS_NAND_ECCPOS (must be the same as .eccpos in
167    GPMC_NAND_HW_BCH8_ECC_LAYOUT defined in
168    arch/arm/include/asm/arch-omap3/omap_gpmc.h)
169  * CONFIG_SYS_NAND_ECCSIZE must be 512
170  * CONFIG_SYS_NAND_ECCBYTES must be 13 for this BCH8 setup
171 
172 Acknowledgements
173 ================
174 
175 OMAP3 U-Boot is based on U-Boot tar ball [9] for BeagleBoard and EVM done by
176 several TI employees.
177 
178 Links
179 =====
180 
181 [1] OMAP3:
182 
183 http://www.ti.com/omap3 (high volume) and
184 http://www.ti.com/omap35x (broad market)
185 
186 [2] OMAP3530 BeagleBoard:
187 
188 http://beagleboard.org/
189 
190 [3] Gumstix Overo:
191 
192 http://www.gumstix.net/Overo/
193 
194 [4] TI EVM:
195 
196 http://focus.ti.com/docs/toolsw/folders/print/tmdxevm3503.html
197 
198 [5] OpenPandora Ltd. Pandora:
199 
200 http://openpandora.org/
201 
202 [6] TI/Logic PD Zoom MDK:
203 
204 http://www.logicpd.com/products/devkit/ti/zoom_mobile_development_kit
205 
206 [7] TI/Logic PD Zoom 2
207 
208 http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
209 
210 [8] CompuLab Ltd. CM-T35:
211 
212 http://www.compulab.co.il/t3530/html/t3530-cm-datasheet.htm
213 
214 [9] TI OMAP3 U-Boot:
215 
216 http://beagleboard.googlecode.com/files/u-boot_beagle_revb.tar.gz
217