xref: /openbmc/u-boot/doc/README.fec_mxc (revision c66f5620)
1U-Boot config options used in fec_mxc.c
2
3CONFIG_FEC_MXC
4	Selects fec_mxc.c to be compiled into u-boot. Can read out the
5	ethaddr from the SoC eFuses (see below).
6
7CONFIG_MII
8	Must be defined if CONFIG_FEC_MXC is defined.
9
10CONFIG_FEC_XCV_TYPE
11	Defaults to MII100 for 100 Base-tx.
12	RGMII selects 1000 Base-tx reduced pin count interface.
13	RMII selects 100 Base-tx reduced pin count interface.
14
15CONFIG_FEC_MXC_SWAP_PACKET
16	Forced on iff MX28.
17	Swaps the bytes order of all words(4 byte units) in the packet.
18	This should not be specified by a board file. It is cpu specific.
19
20CONFIG_PHYLIB
21	fec_mxc supports PHYLIB and should be used for new boards.
22
23CONFIG_FEC_MXC_NO_ANEG
24	Relevant only if PHYLIB not used. Skips auto-negotiation restart.
25
26CONFIG_FEC_MXC_PHYADDR
27	Optional, selects the exact phy address that should be connected
28	and function fecmxc_initialize will try to initialize it.
29
30CONFIG_FEC_FIXED_SPEED
31	Optional, selects a fixed speed on the MAC interface without asking some
32	phy. This is usefull if there is a direct MAC <-> MAC connection, for
33	example if the CPU is connected directly via the RGMII interface to a
34	ethernet-switch.
35
36Reading the ethaddr from the SoC eFuses:
37if CONFIG_FEC_MXC is defined and the U-Boot environment does not contain the
38ethaddr variable, then its value gets read from the corresponding eFuses in
39the SoC. See the README files of the specific SoC for details.
40