xref: /openbmc/u-boot/doc/README.cfi (revision b44b3026)
1The common CFI driver provides this weak default implementation for
2flash_cmd_reset():
3
4static void __flash_cmd_reset(flash_info_t *info)
5{
6	/*
7	 * We do not yet know what kind of commandset to use, so we issue
8	 * the reset command in both Intel and AMD variants, in the hope
9	 * that AMD flash roms ignore the Intel command.
10	 */
11	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
12	udelay(1);
13	flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
14}
15void flash_cmd_reset(flash_info_t *info)
16	__attribute__((weak,alias("__flash_cmd_reset")));
17
18Some flash chips seem to have trouble with this reset sequence.
19In this case, board-specific code can override this weak default
20version with a board-specific function.
21
22At the time of writing, there are two boards that define their own
23routine for this.
24
25First, the digsy_mtc board equipped with the M29W128GH from Numonyx
26needs this version to function properly:
27
28void flash_cmd_reset(flash_info_t *info)
29{
30	flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
31}
32
33In addition, the t3corp board defines the routine thusly:
34
35void flash_cmd_reset(flash_info_t *info)
36{
37	/*
38	 * FLASH at address CONFIG_SYS_FLASH_BASE is a Spansion chip and
39	 * needs the Spansion type reset commands. The other flash chip
40	 * is located behind a FPGA (Xilinx DS617) and needs the Intel type
41	 * reset command.
42	 */
43	if (info->start[0] == CONFIG_SYS_FLASH_BASE)
44		flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
45	else
46		flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
47}
48
49see also:
50http://www.mail-archive.com/u-boot@lists.denx.de/msg24368.html
51
52
53Config Option
54
55  CONFIG_SYS_MAX_FLASH_SECT: Number of sectors available on Flash device
56
57  CONFIG_SYS_FLASH_CFI_WIDTH: Data-width of the flash device
58
59  CONFIG_CMD_FLASH: Enables Flash command library
60
61  CONFIG_FLASH_CFI_DRIVER: Enables CFI Flash driver
62
63  CONFIG_FLASH_CFI_MTD: Enables MTD frame work for NOR Flash devices
64