1/* 2 * (C) Copyright 2008-2009 3 * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de> 4 * Jens Scharsig <esw@bus-elektronik.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9U-Boot vcxk video controller driver 10====================================== 11 12By defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and 13VC8K devices on following boards: 14 15board | ARCH | Vendor 16----------------------------------------------------------------------- 17EB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG 18EB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG 19EB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG 20ZLSA | AT91RM9200 | Ruf Telematik AG 21 22Driver configuration 23-------------------- 24 25The driver needs some defines to describe the target hardware: 26 27CONFIG_SYS_VCXK_BASE 28 29 base address of VCxK hardware memory 30 31CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 32 33 defines the physical alignment of a pixel row 34 35CONFIG_SYS_VCXK_DOUBLEBUFFERED 36 37 some boards that use vcxk prevent read from framebuffer memory. 38 define this option to enable double buffering (needs 16KiB RAM) 39 40CONFIG_SYS_VCXK_<xxxx>_PIN 41 42 defines the number of the I/O line PIN in the port 43 valid values for <xxxx> are: 44 45 ACKNOWLEDGE 46 describes the acknowledge line from vcxk hardware 47 48 ENABLE 49 describes the enable line to vcxk hardware 50 51 INVERT 52 describes the invert line to vcxk hardware 53 54 RESET 55 describes the reset line to vcxk hardware 56 57 REQUEST 58 describes the request line to vcxk hardware 59 60CONFIG_SYS_VCXK_<xxxx>_PORT 61 62 defines the I/O port which is connected with the line 63 for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN 64 65CONFIG_SYS_VCXK_<xxxx>_DDR 66 67 defines the register which configures the direction 68 for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN 69