1*50217deeSJens Scharsig/* 2*50217deeSJens Scharsig * (C) Copyright 2008-2009 3*50217deeSJens Scharsig * BuS Elektronik GmbH & Co. KG <www.bus-elektronik.de> 4*50217deeSJens Scharsig * Jens Scharsig <esw@bus-elektronik.de> 5*50217deeSJens Scharsig * 6*50217deeSJens Scharsig * See file CREDITS for list of people who contributed to this 7*50217deeSJens Scharsig * project. 8*50217deeSJens Scharsig * 9*50217deeSJens Scharsig * This program is free software; you can redistribute it and/or 10*50217deeSJens Scharsig * modify it under the terms of the GNU General Public License as 11*50217deeSJens Scharsig * published by the Free Software Foundation; either version 2 of 12*50217deeSJens Scharsig * the License, or (at your option) any later version. 13*50217deeSJens Scharsig * 14*50217deeSJens Scharsig * This program is distributed in the hope that it will be useful, 15*50217deeSJens Scharsig * but WITHOUT ANY WARRANTY; without even the implied warranty of 16*50217deeSJens Scharsig * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17*50217deeSJens Scharsig * GNU General Public License for more details. 18*50217deeSJens Scharsig * 19*50217deeSJens Scharsig * You should have received a copy of the GNU General Public License 20*50217deeSJens Scharsig * along with this program; if not, write to the Free Software 21*50217deeSJens Scharsig * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22*50217deeSJens Scharsig * MA 02111-1307 USA 23*50217deeSJens Scharsig */ 24*50217deeSJens Scharsig 25*50217deeSJens ScharsigU-Boot vcxk video controller driver 26*50217deeSJens Scharsig====================================== 27*50217deeSJens Scharsig 28*50217deeSJens ScharsigBy defining CONFIG_VIDEO_VCXK this driver can be used with VC2K, VC4K and 29*50217deeSJens ScharsigVC8K devices on following boards: 30*50217deeSJens Scharsig 31*50217deeSJens Scharsigboard | ARCH | Vendor 32*50217deeSJens Scharsig----------------------------------------------------------------------- 33*50217deeSJens ScharsigEB+CPU5282-T1 | MCF5282 | BuS Elektronik GmbH & Co. KG 34*50217deeSJens ScharsigEB+MCF-EVB123 | MCF5282 | BuS Elektronik GmbH & Co. KG 35*50217deeSJens ScharsigEB+CPUx9K2 | AT91RM9200 | BuS Elektronik GmbH & Co. KG 36*50217deeSJens ScharsigZLSA | AT91RM9200 | Ruf Telematik AG 37*50217deeSJens Scharsig 38*50217deeSJens ScharsigDriver configuration 39*50217deeSJens Scharsig-------------------- 40*50217deeSJens Scharsig 41*50217deeSJens ScharsigThe driver needs some defines to describe the target hardware: 42*50217deeSJens Scharsig 43*50217deeSJens ScharsigCONFIG_SYS_VCXK_BASE 44*50217deeSJens Scharsig 45*50217deeSJens Scharsig base address of VCxK hardware memory 46*50217deeSJens Scharsig 47*50217deeSJens ScharsigCONFIG_SYS_VCXK_DEFAULT_LINEALIGN 48*50217deeSJens Scharsig 49*50217deeSJens Scharsig defines the physical alignment of a pixel row 50*50217deeSJens Scharsig 51*50217deeSJens ScharsigCONFIG_SYS_VCXK_DOUBLEBUFFERED 52*50217deeSJens Scharsig 53*50217deeSJens Scharsig some boards that use vcxk prevent read from framebuffer memory. 54*50217deeSJens Scharsig define this option to enable double buffering (needs 16KiB RAM) 55*50217deeSJens Scharsig 56*50217deeSJens ScharsigCONFIG_SYS_VCXK_<xxxx>_PIN 57*50217deeSJens Scharsig 58*50217deeSJens Scharsig defines the number of the I/O line PIN in the port 59*50217deeSJens Scharsig valid values for <xxxx> are: 60*50217deeSJens Scharsig 61*50217deeSJens Scharsig ACKNOWLEDGE 62*50217deeSJens Scharsig describes the acknowledge line from vcxk hardware 63*50217deeSJens Scharsig 64*50217deeSJens Scharsig ENABLE 65*50217deeSJens Scharsig describes the enable line to vcxk hardware 66*50217deeSJens Scharsig 67*50217deeSJens Scharsig INVERT 68*50217deeSJens Scharsig describes the invert line to vcxk hardware 69*50217deeSJens Scharsig 70*50217deeSJens Scharsig RESET 71*50217deeSJens Scharsig describes the reset line to vcxk hardware 72*50217deeSJens Scharsig 73*50217deeSJens Scharsig REQUEST 74*50217deeSJens Scharsig describes the request line to vcxk hardware 75*50217deeSJens Scharsig 76*50217deeSJens ScharsigCONFIG_SYS_VCXK_<xxxx>_PORT 77*50217deeSJens Scharsig 78*50217deeSJens Scharsig defines the I/O port which is connected with the line 79*50217deeSJens Scharsig for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN 80*50217deeSJens Scharsig 81*50217deeSJens ScharsigCONFIG_SYS_VCXK_<xxxx>_DDR 82*50217deeSJens Scharsig 83*50217deeSJens Scharsig defines the register which configures the direction 84*50217deeSJens Scharsig for valid values for <xxxx> see CONFIG_SYS_VCXK_<xxxx>_PIN 85*50217deeSJens Scharsig 86