xref: /openbmc/u-boot/doc/README.atmel_pmecc (revision bdfd59aa0f00ea86b1ecf44303790eea355b8585)
1*bdfd59aaSWu, JoshHow to enable PMECC(Programmable Multibit ECC) for nand on Atmel SoCs
2*bdfd59aaSWu, Josh-----------------------------------------------------------
3*bdfd59aaSWu, Josh2012-08-22 Josh Wu <josh.wu@atmel.com>
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5*bdfd59aaSWu, JoshThe Programmable Multibit ECC (PMECC) controller is a programmable binary
6*bdfd59aaSWu, JoshBCH(Bose, Chaudhuri and Hocquenghem) encoder and decoder. This controller
7*bdfd59aaSWu, Joshcan be used to support both SLC and MLC NAND Flash devices. It supports to
8*bdfd59aaSWu, Joshgenerate ECC to correct 2, 4, 8, 12 or 24 bits of error per sector (512 or
9*bdfd59aaSWu, Josh1024 bytes) of data.
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11*bdfd59aaSWu, JoshFollowing Atmel AT91 products support PMECC.
12*bdfd59aaSWu, Josh- AT91SAM9X25, X35, G25, G15, G35 (tested)
13*bdfd59aaSWu, Josh- AT91SAM9N12 (not tested, Should work)
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15*bdfd59aaSWu, JoshAs soon as your nand flash software ECC works, you can enable PMECC.
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17*bdfd59aaSWu, JoshTo use PMECC in this driver, the user needs to set:
18*bdfd59aaSWu, Josh	1. the PMECC correction error bits capability: CONFIG_PMECC_CAP.
19*bdfd59aaSWu, Josh	   It can be 2, 4, 8, 12 or 24.
20*bdfd59aaSWu, Josh	2. The PMECC sector size: CONFIG_PMECC_SECTOR_SIZE.
21*bdfd59aaSWu, Josh	   It only can be 512 or 1024.
22*bdfd59aaSWu, Josh	3. The PMECC index lookup table's offsets in ROM code: CONFIG_PMECC_INDEX_TABLE_OFFSET.
23*bdfd59aaSWu, Josh	   In the chip datasheet section "Boot Stragegies", you can find
24*bdfd59aaSWu, Josh	   two Galois Field Table in the ROM code. One table is for 512-bytes
25*bdfd59aaSWu, Josh	   sector. Another is for 1024-byte sector. Each Galois Field includes
26*bdfd59aaSWu, Josh	   two sub-table: indext table & alpha table.
27*bdfd59aaSWu, Josh	   In the beginning of each Galois Field Table is the index table,
28*bdfd59aaSWu, Josh	   Alpha table is in the following.
29*bdfd59aaSWu, Josh	   So the index table's offset is same as the Galois Field Table.
30*bdfd59aaSWu, Josh
31*bdfd59aaSWu, Josh	   Please set CONFIG_PMECC_INDEX_TABLE_OFFSET correctly according the
32*bdfd59aaSWu, Josh	   Galois Field Table's offset base on the sector size you used.
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34*bdfd59aaSWu, JoshTake AT91SAM9X5EK as an example, the board definition file likes:
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36*bdfd59aaSWu, Josh/* PMECC & PMERRLOC */
37*bdfd59aaSWu, Josh#define CONFIG_ATMEL_NAND_HWECC		1
38*bdfd59aaSWu, Josh#define CONFIG_ATMEL_NAND_HW_PMECC	1
39*bdfd59aaSWu, Josh#define CONFIG_PMECC_CAP		2
40*bdfd59aaSWu, Josh#define CONFIG_PMECC_SECTOR_SIZE	512
41*bdfd59aaSWu, Josh#define CONFIG_PMECC_INDEX_TABLE_OFFSET	0x8000
42*bdfd59aaSWu, Josh
43*bdfd59aaSWu, JoshNOTE: If you use 1024 as the sector size, then need set 0x10000 as the
44*bdfd59aaSWu, Josh CONFIG_PMECC_INDEX_TABLE_OFFSET
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