xref: /openbmc/u-boot/doc/README.ARC (revision e7e90901)
1Synopsys' DesignWare(r) ARC(r) Processors are a family of 32-bit CPUs
2that SoC designers can optimize for a wide range of uses, from deeply embedded
3to high-performance host applications.
4
5More information on ARC cores avaialble here:
6http://www.synopsys.com/IP/ProcessorIP/ARCProcessors/Pages/default.aspx
7
8Designers can differentiate their products by using patented configuration
9technology to tailor each ARC processor instance to meet specific performance,
10power and area requirements.
11
12The DesignWare ARC processors are also extendable, allowing designers to add
13their own custom instructions that dramatically increase performance.
14
15Synopsys' ARC processors have been used by over 170 customers worldwide who
16collectively ship more than 1 billion ARC-based chips annually.
17
18All DesignWare ARC processors utilize a 16-/32-bit ISA that provides excellent
19performance and code density for embedded and host SoC applications.
20
21The RISC microprocessors are synthesizable and can be implemented in any foundry
22or process, and are supported by a complete suite of development tools.
23
24The ARC GNU toolchain with support for all ARC Processors can be downloaded
25from here (available pre-built toolchains as well):
26
27https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases
28