1CONFIG_ARM=y
2CONFIG_ARCH_ZYNQMP=y
3CONFIG_SYS_TEXT_BASE=0x8000000
4CONFIG_SYS_MALLOC_F_LEN=0x8000
5CONFIG_SPL=y
6CONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1751 xm018 dc4"
7CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1751-xm018-dc4"
8CONFIG_DEBUG_UART=y
9CONFIG_DISTRO_DEFAULTS=y
10CONFIG_FIT=y
11CONFIG_FIT_VERBOSE=y
12CONFIG_SPL_LOAD_FIT=y
13# CONFIG_DISPLAY_CPUINFO is not set
14# CONFIG_DISPLAY_BOARDINFO is not set
15CONFIG_SPL_OS_BOOT=y
16CONFIG_SPL_RAM_SUPPORT=y
17CONFIG_SPL_RAM_DEVICE=y
18CONFIG_SYS_PROMPT="ZynqMP> "
19CONFIG_CMD_MEMTEST=y
20CONFIG_SYS_ALT_MEMTEST=y
21CONFIG_CMD_CLK=y
22# CONFIG_CMD_FLASH is not set
23CONFIG_CMD_FPGA_LOADBP=y
24CONFIG_CMD_FPGA_LOADP=y
25CONFIG_CMD_I2C=y
26CONFIG_CMD_MMC=y
27CONFIG_CMD_TFTPPUT=y
28CONFIG_CMD_TIME=y
29CONFIG_CMD_TIMER=y
30CONFIG_CMD_EXT4_WRITE=y
31# CONFIG_SPL_ISO_PARTITION is not set
32CONFIG_SPL_OF_CONTROL=y
33CONFIG_OF_EMBED=y
34CONFIG_ENV_IS_IN_FAT=y
35CONFIG_NET_RANDOM_ETHADDR=y
36CONFIG_SPL_DM=y
37CONFIG_SPL_DM_SEQ_ALIAS=y
38CONFIG_CLK_ZYNQMP=y
39CONFIG_FPGA_XILINX=y
40CONFIG_FPGA_ZYNQMPPL=y
41CONFIG_DM_GPIO=y
42CONFIG_DM_I2C=y
43CONFIG_SYS_I2C_CADENCE=y
44CONFIG_MISC=y
45CONFIG_DM_MMC=y
46CONFIG_MMC_SDHCI=y
47CONFIG_MMC_SDHCI_ZYNQ=y
48CONFIG_SPI_FLASH=y
49CONFIG_SPI_FLASH_BAR=y
50CONFIG_SPI_FLASH_MACRONIX=y
51CONFIG_SPI_FLASH_SPANSION=y
52CONFIG_SPI_FLASH_STMICRO=y
53CONFIG_SPI_FLASH_WINBOND=y
54# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
55CONFIG_PHY_MARVELL=y
56CONFIG_PHY_NATSEMI=y
57CONFIG_PHY_REALTEK=y
58CONFIG_PHY_TI=y
59CONFIG_PHY_VITESSE=y
60CONFIG_DM_ETH=y
61CONFIG_PHY_GIGE=y
62CONFIG_ZYNQ_GEM=y
63CONFIG_DEBUG_UART_ZYNQ=y
64CONFIG_DEBUG_UART_BASE=0xff000000
65CONFIG_DEBUG_UART_CLOCK=100000000
66CONFIG_DEBUG_UART_ANNOUNCE=y
67CONFIG_ZYNQ_SERIAL=y
68