1*04ab29abSSiva Durga Prasad PaladuguCONFIG_ARM=y 2*04ab29abSSiva Durga Prasad PaladuguCONFIG_SYS_CONFIG_NAME="xilinx_zynqmp_zc1275_revB" 3*04ab29abSSiva Durga Prasad PaladuguCONFIG_ARCH_ZYNQMP=y 4*04ab29abSSiva Durga Prasad PaladuguCONFIG_SYS_TEXT_BASE=0x8000000 5*04ab29abSSiva Durga Prasad PaladuguCONFIG_SYS_MALLOC_F_LEN=0x8000 6*04ab29abSSiva Durga Prasad Paladugu# CONFIG_SPL_LIBDISK_SUPPORT is not set 7*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL=y 8*04ab29abSSiva Durga Prasad PaladuguCONFIG_IDENT_STRING=" Xilinx ZynqMP ZC1275 revB" 9*04ab29abSSiva Durga Prasad Paladugu# CONFIG_SPL_FAT_SUPPORT is not set 10*04ab29abSSiva Durga Prasad PaladuguCONFIG_DEFAULT_DEVICE_TREE="zynqmp-zc1275-revB" 11*04ab29abSSiva Durga Prasad PaladuguCONFIG_DEBUG_UART=y 12*04ab29abSSiva Durga Prasad PaladuguCONFIG_DISTRO_DEFAULTS=y 13*04ab29abSSiva Durga Prasad PaladuguCONFIG_FIT=y 14*04ab29abSSiva Durga Prasad PaladuguCONFIG_FIT_VERBOSE=y 15*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_LOAD_FIT=y 16*04ab29abSSiva Durga Prasad Paladugu# CONFIG_DISPLAY_CPUINFO is not set 17*04ab29abSSiva Durga Prasad Paladugu# CONFIG_DISPLAY_BOARDINFO is not set 18*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_OS_BOOT=y 19*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_RAM_SUPPORT=y 20*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_RAM_DEVICE=y 21*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_ATF=y 22*04ab29abSSiva Durga Prasad PaladuguCONFIG_SYS_PROMPT="ZynqMP> " 23*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_MEMTEST=y 24*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_CLK=y 25*04ab29abSSiva Durga Prasad Paladugu# CONFIG_CMD_FLASH is not set 26*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_FPGA_LOADBP=y 27*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_FPGA_LOADP=y 28*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_MMC=y 29*04ab29abSSiva Durga Prasad Paladugu# CONFIG_CMD_NET is not set 30*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_TIME=y 31*04ab29abSSiva Durga Prasad PaladuguCONFIG_CMD_TIMER=y 32*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_OF_CONTROL=y 33*04ab29abSSiva Durga Prasad PaladuguCONFIG_OF_EMBED=y 34*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPL_DM=y 35*04ab29abSSiva Durga Prasad PaladuguCONFIG_CLK_ZYNQMP=y 36*04ab29abSSiva Durga Prasad PaladuguCONFIG_FPGA_XILINX=y 37*04ab29abSSiva Durga Prasad PaladuguCONFIG_FPGA_ZYNQMPPL=y 38*04ab29abSSiva Durga Prasad PaladuguCONFIG_MISC=y 39*04ab29abSSiva Durga Prasad PaladuguCONFIG_DM_MMC=y 40*04ab29abSSiva Durga Prasad PaladuguCONFIG_MMC_SDHCI=y 41*04ab29abSSiva Durga Prasad PaladuguCONFIG_MMC_SDHCI_ZYNQ=y 42*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPI_FLASH=y 43*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPI_FLASH_BAR=y 44*04ab29abSSiva Durga Prasad PaladuguCONFIG_SF_DUAL_FLASH=y 45*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPI_FLASH_MACRONIX=y 46*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPI_FLASH_SPANSION=y 47*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPI_FLASH_STMICRO=y 48*04ab29abSSiva Durga Prasad PaladuguCONFIG_SPI_FLASH_WINBOND=y 49*04ab29abSSiva Durga Prasad Paladugu# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 50*04ab29abSSiva Durga Prasad PaladuguCONFIG_DEBUG_UART_ZYNQ=y 51*04ab29abSSiva Durga Prasad PaladuguCONFIG_DEBUG_UART_BASE=0xff000000 52*04ab29abSSiva Durga Prasad PaladuguCONFIG_DEBUG_UART_CLOCK=100000000 53*04ab29abSSiva Durga Prasad PaladuguCONFIG_DEBUG_UART_ANNOUNCE=y 54*04ab29abSSiva Durga Prasad PaladuguCONFIG_ZYNQ_SERIAL=y 55*04ab29abSSiva Durga Prasad PaladuguCONFIG_EFI_LOADER_BOUNCE_BUFFER=y 56