1ae9996c8SStefan RoeseCONFIG_ARM=y 2ae9996c8SStefan RoeseCONFIG_ARCH_SOCFPGA=y 3ae9996c8SStefan RoeseCONFIG_SYS_MALLOC_F_LEN=0x2000 4ae9996c8SStefan RoeseCONFIG_SPL_DM=y 5ae9996c8SStefan RoeseCONFIG_DM_GPIO=y 6ae9996c8SStefan RoeseCONFIG_TARGET_SOCFPGA_SR1500=y 74edb9458SSimon GlassCONFIG_SPL_STACK_R_ADDR=0x00800000 8ae9996c8SStefan RoeseCONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" 9ae9996c8SStefan RoeseCONFIG_SPL=y 10ae9996c8SStefan RoeseCONFIG_SPL_STACK_R=y 1173223f0eSSimon GlassCONFIG_FIT=y 12adad96e6STom RiniCONFIG_HUSH_PARSER=y 13*89cb2b5fSTom RiniCONFIG_CMD_BOOTZ=y 14ae9996c8SStefan Roese# CONFIG_CMD_IMLS is not set 15*89cb2b5fSTom RiniCONFIG_CMD_ASKENV=y 16*89cb2b5fSTom RiniCONFIG_CMD_GREPENV=y 1778d1e1d0STom RiniCONFIG_CMD_MEMTEST=y 18ae9996c8SStefan Roese# CONFIG_CMD_FLASH is not set 19*89cb2b5fSTom RiniCONFIG_CMD_MMC=y 2078d1e1d0STom RiniCONFIG_CMD_SF=y 2178d1e1d0STom RiniCONFIG_CMD_SPI=y 2278d1e1d0STom RiniCONFIG_CMD_I2C=y 2378d1e1d0STom RiniCONFIG_CMD_GPIO=y 2478d1e1d0STom RiniCONFIG_CMD_DHCP=y 25*89cb2b5fSTom RiniCONFIG_CMD_MII=y 2678d1e1d0STom RiniCONFIG_CMD_PING=y 27*89cb2b5fSTom RiniCONFIG_CMD_CACHE=y 2878d1e1d0STom RiniCONFIG_CMD_TIME=y 29*89cb2b5fSTom RiniCONFIG_CMD_EXT4=y 30*89cb2b5fSTom RiniCONFIG_CMD_EXT4_WRITE=y 31*89cb2b5fSTom RiniCONFIG_CMD_FAT=y 32*89cb2b5fSTom RiniCONFIG_CMD_FS_GENERIC=y 334edb9458SSimon GlassCONFIG_SPL_DM_SEQ_ALIAS=y 34ae9996c8SStefan RoeseCONFIG_DWAPB_GPIO=y 354edb9458SSimon GlassCONFIG_DM_MMC=y 36ae9996c8SStefan RoeseCONFIG_SPI_FLASH=y 37adad96e6STom RiniCONFIG_SPI_FLASH_BAR=y 3893d9fc26SStefan RoeseCONFIG_SPI_FLASH_STMICRO=y 394edb9458SSimon Glass# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set 40ae9996c8SStefan RoeseCONFIG_DM_ETH=y 41ae9996c8SStefan RoeseCONFIG_ETH_DESIGNWARE=y 42ae9996c8SStefan RoeseCONFIG_SYS_NS16550=y 4393d9fc26SStefan RoeseCONFIG_CADENCE_QSPI=y 44