155c7a765SDinh NguyenCONFIG_ARM=y
255c7a765SDinh NguyenCONFIG_ARCH_SOCFPGA=y
380df6913SBin MengCONFIG_SYS_MALLOC_F_LEN=0x2000
480df6913SBin MengCONFIG_SPL_DM=y
580df6913SBin MengCONFIG_DM_GPIO=y
655c7a765SDinh NguyenCONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y
7e4aa8edbSThomas ChouCONFIG_SPL_STACK_R_ADDR=0x00800000
855c7a765SDinh NguyenCONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc"
955c7a765SDinh NguyenCONFIG_SPL=y
1055c7a765SDinh NguyenCONFIG_SPL_STACK_R=y
11*73223f0eSSimon GlassCONFIG_FIT=y
1280df6913SBin Meng# CONFIG_CMD_IMLS is not set
1380df6913SBin Meng# CONFIG_CMD_FLASH is not set
14e4aa8edbSThomas ChouCONFIG_CMD_GPIO=y
1580df6913SBin MengCONFIG_DWAPB_GPIO=y
164edb9458SSimon GlassCONFIG_DM_MMC=y
1780df6913SBin MengCONFIG_DM_ETH=y
1880df6913SBin MengCONFIG_ETH_DESIGNWARE=y
199e39003eSThomas ChouCONFIG_SYS_NS16550=y
20e5d5d447SBin MengCONFIG_CADENCE_QSPI=y
21e5d5d447SBin MengCONFIG_DESIGNWARE_SPI=y
225b5226a8SMarek VasutCONFIG_USB=y
235b5226a8SMarek VasutCONFIG_DM_USB=y
24