xref: /openbmc/u-boot/common/spl/spl_atf.c (revision baefb63a)
1 /*
2  * Reference to the ARM TF Project,
3  * plat/arm/common/arm_bl2_setup.c
4  * Portions copyright (c) 2013-2016, ARM Limited and Contributors. All rights
5  * reserved.
6  * Copyright (C) 2016 Rockchip Electronic Co.,Ltd
7  * Written by Kever Yang <kever.yang@rock-chips.com>
8  * Copyright (C) 2017 Theobroma Systems Design und Consulting GmbH
9  *
10  * SPDX-License-Identifier:     BSD-3-Clause
11  */
12 
13 #include <common.h>
14 #include <atf_common.h>
15 #include <errno.h>
16 #include <spl.h>
17 
18 static struct bl2_to_bl31_params_mem bl31_params_mem;
19 static struct bl31_params *bl2_to_bl31_params;
20 
21 /**
22  * bl2_plat_get_bl31_params() - prepare params for bl31.
23  *
24  * This function assigns a pointer to the memory that the platform has kept
25  * aside to pass platform specific and trusted firmware related information
26  * to BL31. This memory is allocated by allocating memory to
27  * bl2_to_bl31_params_mem structure which is a superset of all the
28  * structure whose information is passed to BL31
29  * NOTE: This function should be called only once and should be done
30  * before generating params to BL31
31  *
32  * @return bl31 params structure pointer
33  */
34 static struct bl31_params *bl2_plat_get_bl31_params(uintptr_t bl33_entry)
35 {
36 	struct entry_point_info *bl33_ep_info;
37 
38 	/*
39 	 * Initialise the memory for all the arguments that needs to
40 	 * be passed to BL31
41 	 */
42 	memset(&bl31_params_mem, 0, sizeof(struct bl2_to_bl31_params_mem));
43 
44 	/* Assign memory for TF related information */
45 	bl2_to_bl31_params = &bl31_params_mem.bl31_params;
46 	SET_PARAM_HEAD(bl2_to_bl31_params, ATF_PARAM_BL31, ATF_VERSION_1, 0);
47 
48 	/* Fill BL31 related information */
49 	SET_PARAM_HEAD(bl2_to_bl31_params->bl31_image_info,
50 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
51 
52 	/* Fill BL32 related information if it exists */
53 #ifdef BL32_BASE
54 	bl2_to_bl31_params->bl32_ep_info = &bl31_params_mem.bl32_ep_info;
55 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_ep_info, ATF_PARAM_EP,
56 		       ATF_VERSION_1, 0);
57 	bl2_to_bl31_params->bl32_image_info = &bl31_params_mem.bl32_image_info;
58 	SET_PARAM_HEAD(bl2_to_bl31_params->bl32_image_info,
59 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
60 #endif /* BL32_BASE */
61 
62 	/* Fill BL33 related information */
63 	bl2_to_bl31_params->bl33_ep_info = &bl31_params_mem.bl33_ep_info;
64 	bl33_ep_info = &bl31_params_mem.bl33_ep_info;
65 	SET_PARAM_HEAD(bl33_ep_info, ATF_PARAM_EP, ATF_VERSION_1,
66 		       ATF_EP_NON_SECURE);
67 
68 	/* BL33 expects to receive the primary CPU MPID (through x0) */
69 	bl33_ep_info->args.arg0 = 0xffff & read_mpidr();
70 	bl33_ep_info->pc = bl33_entry;
71 	bl33_ep_info->spsr = SPSR_64(MODE_EL2, MODE_SP_ELX,
72 				     DISABLE_ALL_EXECPTIONS);
73 
74 	bl2_to_bl31_params->bl33_image_info = &bl31_params_mem.bl33_image_info;
75 	SET_PARAM_HEAD(bl2_to_bl31_params->bl33_image_info,
76 		       ATF_PARAM_IMAGE_BINARY, ATF_VERSION_1, 0);
77 
78 	return bl2_to_bl31_params;
79 }
80 
81 static inline void raw_write_daif(unsigned int daif)
82 {
83 	__asm__ __volatile__("msr DAIF, %0\n\t" : : "r" (daif) : "memory");
84 }
85 
86 typedef void (*atf_entry_t)(struct bl31_params *params, void *plat_params);
87 
88 static void bl31_entry(uintptr_t bl31_entry, uintptr_t bl33_entry,
89 		       uintptr_t fdt_addr)
90 {
91 	struct bl31_params *bl31_params;
92 	atf_entry_t  atf_entry = (atf_entry_t)bl31_entry;
93 
94 	bl31_params = bl2_plat_get_bl31_params(bl33_entry);
95 
96 	raw_write_daif(SPSR_EXCEPTION_MASK);
97 	dcache_disable();
98 
99 	atf_entry((void *)bl31_params, (void *)fdt_addr);
100 }
101 
102 static int spl_fit_images_find_uboot(void *blob)
103 {
104 	int parent, node, ndepth;
105 	const void *data;
106 
107 	if (!blob)
108 		return -FDT_ERR_BADMAGIC;
109 
110 	parent = fdt_path_offset(blob, "/fit-images");
111 	if (parent < 0)
112 		return -FDT_ERR_NOTFOUND;
113 
114 	for (node = fdt_next_node(blob, parent, &ndepth);
115 	     (node >= 0) && (ndepth > 0);
116 	     node = fdt_next_node(blob, node, &ndepth)) {
117 		if (ndepth != 1)
118 			continue;
119 
120 		data = fdt_getprop(blob, node, FIT_OS_PROP, NULL);
121 		if (!data)
122 			continue;
123 
124 		if (genimg_get_os_id(data) == IH_OS_U_BOOT)
125 			return node;
126 	};
127 
128 	return -FDT_ERR_NOTFOUND;
129 }
130 
131 uintptr_t spl_fit_images_get_entry(void *blob, int node)
132 {
133 	ulong  val;
134 
135 	val = fdt_getprop_u32(blob, node, "entry-point");
136 	if (val == FDT_ERROR)
137 		val = fdt_getprop_u32(blob, node, "load-addr");
138 
139 	debug("%s: entry point 0x%lx\n", __func__, val);
140 	return val;
141 }
142 
143 void spl_invoke_atf(struct spl_image_info *spl_image)
144 {
145 	uintptr_t  bl33_entry = CONFIG_SYS_TEXT_BASE;
146 	void *blob = spl_image->fdt_addr;
147 	int node;
148 
149 	/*
150 	 * Find the U-Boot binary (in /fit-images) load addreess or
151 	 * entry point (if different) and pass it as the BL3-3 entry
152 	 * point.
153 	 * This will need to be extended to support Falcon mode.
154 	 */
155 
156 	node = spl_fit_images_find_uboot(blob);
157 	if (node >= 0)
158 		bl33_entry = spl_fit_images_get_entry(blob, node);
159 
160 	/*
161 	 * We don't provide a BL3-2 entry yet, but this will be possible
162 	 * using similar logic.
163 	 */
164 	bl31_entry(spl_image->entry_point, bl33_entry, (uintptr_t)blob);
165 }
166