1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * (C) Copyright 2010 4 * Texas Instruments, <www.ti.com> 5 * 6 * Aneesh V <aneesh@ti.com> 7 */ 8 9 #include <common.h> 10 #include <bloblist.h> 11 #include <binman_sym.h> 12 #include <dm.h> 13 #include <handoff.h> 14 #include <spl.h> 15 #include <asm/gpio.h> 16 #include <asm/sections.h> 17 #include <asm/u-boot.h> 18 #include <nand.h> 19 #include <fat.h> 20 #include <version.h> 21 #include <image.h> 22 #include <malloc.h> 23 #include <dm/root.h> 24 #include <linux/compiler.h> 25 #include <fdt_support.h> 26 #include <bootcount.h> 27 28 DECLARE_GLOBAL_DATA_PTR; 29 30 #ifndef CONFIG_SYS_UBOOT_START 31 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 32 #endif 33 #ifndef CONFIG_SYS_MONITOR_LEN 34 /* Unknown U-Boot size, let's assume it will not be more than 200 KB */ 35 #define CONFIG_SYS_MONITOR_LEN (200 * 1024) 36 #endif 37 38 u32 *boot_params_ptr = NULL; 39 40 /* See spl.h for information about this */ 41 binman_sym_declare(ulong, u_boot_any, image_pos); 42 43 /* Define board data structure */ 44 static bd_t bdata __attribute__ ((section(".data"))); 45 46 /* 47 * Board-specific Platform code can reimplement show_boot_progress () if needed 48 */ 49 __weak void show_boot_progress(int val) {} 50 51 #if defined(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) 52 /* weak, default platform-specific function to initialize dram banks */ 53 __weak int dram_init_banksize(void) 54 { 55 return 0; 56 } 57 #endif 58 59 /* 60 * Default function to determine if u-boot or the OS should 61 * be started. This implementation always returns 1. 62 * 63 * Please implement your own board specific funcion to do this. 64 * 65 * RETURN 66 * 0 to not start u-boot 67 * positive if u-boot should start 68 */ 69 #ifdef CONFIG_SPL_OS_BOOT 70 __weak int spl_start_uboot(void) 71 { 72 puts(SPL_TPL_PROMPT 73 "Please implement spl_start_uboot() for your board\n"); 74 puts(SPL_TPL_PROMPT "Direct Linux boot not active!\n"); 75 return 1; 76 } 77 78 /* 79 * Weak default function for arch specific zImage check. Return zero 80 * and fill start and end address if image is recognized. 81 */ 82 int __weak bootz_setup(ulong image, ulong *start, ulong *end) 83 { 84 return 1; 85 } 86 #endif 87 88 /* Weak default function for arch/board-specific fixups to the spl_image_info */ 89 void __weak spl_perform_fixups(struct spl_image_info *spl_image) 90 { 91 } 92 93 void spl_fixup_fdt(void) 94 { 95 #if defined(CONFIG_SPL_OF_LIBFDT) && defined(CONFIG_SYS_SPL_ARGS_ADDR) 96 void *fdt_blob = (void *)CONFIG_SYS_SPL_ARGS_ADDR; 97 int err; 98 99 err = fdt_check_header(fdt_blob); 100 if (err < 0) { 101 printf("fdt_root: %s\n", fdt_strerror(err)); 102 return; 103 } 104 105 /* fixup the memory dt node */ 106 err = fdt_shrink_to_minimum(fdt_blob, 0); 107 if (err == 0) { 108 printf(SPL_TPL_PROMPT "fdt_shrink_to_minimum err - %d\n", err); 109 return; 110 } 111 112 err = arch_fixup_fdt(fdt_blob); 113 if (err) { 114 printf(SPL_TPL_PROMPT "arch_fixup_fdt err - %d\n", err); 115 return; 116 } 117 #endif 118 } 119 120 /* 121 * Weak default function for board specific cleanup/preparation before 122 * Linux boot. Some boards/platforms might not need it, so just provide 123 * an empty stub here. 124 */ 125 __weak void spl_board_prepare_for_linux(void) 126 { 127 /* Nothing to do! */ 128 } 129 130 __weak void spl_board_prepare_for_boot(void) 131 { 132 /* Nothing to do! */ 133 } 134 135 __weak struct image_header *spl_get_load_buffer(ssize_t offset, size_t size) 136 { 137 return (struct image_header *)(CONFIG_SYS_TEXT_BASE + offset); 138 } 139 140 void spl_set_header_raw_uboot(struct spl_image_info *spl_image) 141 { 142 ulong u_boot_pos = binman_sym(ulong, u_boot_any, image_pos); 143 144 spl_image->size = CONFIG_SYS_MONITOR_LEN; 145 146 /* 147 * Binman error cases: address of the end of the previous region or the 148 * start of the image's entry area (usually 0) if there is no previous 149 * region. 150 */ 151 if (u_boot_pos && u_boot_pos != BINMAN_SYM_MISSING) { 152 /* Binman does not support separated entry addresses */ 153 spl_image->entry_point = u_boot_pos; 154 spl_image->load_addr = u_boot_pos; 155 } else { 156 spl_image->entry_point = CONFIG_SYS_UBOOT_START; 157 spl_image->load_addr = CONFIG_SYS_TEXT_BASE; 158 } 159 spl_image->os = IH_OS_U_BOOT; 160 spl_image->name = "U-Boot"; 161 } 162 163 #ifdef CONFIG_SPL_LOAD_FIT_FULL 164 /* Parse and load full fitImage in SPL */ 165 static int spl_load_fit_image(struct spl_image_info *spl_image, 166 const struct image_header *header) 167 { 168 bootm_headers_t images; 169 const char *fit_uname_config = NULL; 170 const char *fit_uname_fdt = FIT_FDT_PROP; 171 const char *uname; 172 ulong fw_data = 0, dt_data = 0, img_data = 0; 173 ulong fw_len = 0, dt_len = 0, img_len = 0; 174 int idx, conf_noffset; 175 int ret; 176 177 #ifdef CONFIG_SPL_FIT_SIGNATURE 178 images.verify = 1; 179 #endif 180 ret = fit_image_load(&images, (ulong)header, 181 NULL, &fit_uname_config, 182 IH_ARCH_DEFAULT, IH_TYPE_STANDALONE, -1, 183 FIT_LOAD_REQUIRED, &fw_data, &fw_len); 184 if (ret < 0) 185 return ret; 186 187 spl_image->size = fw_len; 188 spl_image->entry_point = fw_data; 189 spl_image->load_addr = fw_data; 190 spl_image->os = IH_OS_U_BOOT; 191 spl_image->name = "U-Boot"; 192 193 debug(SPL_TPL_PROMPT "payload image: %32s load addr: 0x%lx size: %d\n", 194 spl_image->name, spl_image->load_addr, spl_image->size); 195 196 #ifdef CONFIG_SPL_FIT_SIGNATURE 197 images.verify = 1; 198 #endif 199 fit_image_load(&images, (ulong)header, 200 &fit_uname_fdt, &fit_uname_config, 201 IH_ARCH_DEFAULT, IH_TYPE_FLATDT, -1, 202 FIT_LOAD_OPTIONAL, &dt_data, &dt_len); 203 204 conf_noffset = fit_conf_get_node((const void *)header, 205 fit_uname_config); 206 if (conf_noffset <= 0) 207 return 0; 208 209 for (idx = 0; 210 uname = fdt_stringlist_get((const void *)header, conf_noffset, 211 FIT_LOADABLE_PROP, idx, 212 NULL), uname; 213 idx++) 214 { 215 #ifdef CONFIG_SPL_FIT_SIGNATURE 216 images.verify = 1; 217 #endif 218 ret = fit_image_load(&images, (ulong)header, 219 &uname, &fit_uname_config, 220 IH_ARCH_DEFAULT, IH_TYPE_LOADABLE, -1, 221 FIT_LOAD_OPTIONAL_NON_ZERO, 222 &img_data, &img_len); 223 if (ret < 0) 224 return ret; 225 } 226 227 return 0; 228 } 229 #endif 230 231 int spl_parse_image_header(struct spl_image_info *spl_image, 232 const struct image_header *header) 233 { 234 #ifdef CONFIG_SPL_LOAD_FIT_FULL 235 int ret = spl_load_fit_image(spl_image, header); 236 237 if (!ret) 238 return ret; 239 #endif 240 if (image_get_magic(header) == IH_MAGIC) { 241 #ifdef CONFIG_SPL_LEGACY_IMAGE_SUPPORT 242 u32 header_size = sizeof(struct image_header); 243 244 #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK 245 /* check uImage header CRC */ 246 if (!image_check_hcrc(header)) { 247 puts("SPL: Image header CRC check failed!\n"); 248 return -EINVAL; 249 } 250 #endif 251 252 if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) { 253 /* 254 * On some system (e.g. powerpc), the load-address and 255 * entry-point is located at address 0. We can't load 256 * to 0-0x40. So skip header in this case. 257 */ 258 spl_image->load_addr = image_get_load(header); 259 spl_image->entry_point = image_get_ep(header); 260 spl_image->size = image_get_data_size(header); 261 } else { 262 spl_image->entry_point = image_get_load(header); 263 /* Load including the header */ 264 spl_image->load_addr = spl_image->entry_point - 265 header_size; 266 spl_image->size = image_get_data_size(header) + 267 header_size; 268 } 269 #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK 270 /* store uImage data length and CRC to check later */ 271 spl_image->dcrc_data = image_get_load(header); 272 spl_image->dcrc_length = image_get_data_size(header); 273 spl_image->dcrc = image_get_dcrc(header); 274 #endif 275 276 spl_image->os = image_get_os(header); 277 spl_image->name = image_get_name(header); 278 debug(SPL_TPL_PROMPT 279 "payload image: %32s load addr: 0x%lx size: %d\n", 280 spl_image->name, spl_image->load_addr, spl_image->size); 281 #else 282 /* LEGACY image not supported */ 283 debug("Legacy boot image support not enabled, proceeding to other boot methods\n"); 284 return -EINVAL; 285 #endif 286 } else { 287 #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE 288 /* 289 * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the 290 * code which loads images in SPL cannot guarantee that 291 * absolutely all read errors will be reported. 292 * An example is the LPC32XX MLC NAND driver, which 293 * will consider that a completely unreadable NAND block 294 * is bad, and thus should be skipped silently. 295 */ 296 panic("** no mkimage signature but raw image not supported"); 297 #endif 298 299 #ifdef CONFIG_SPL_OS_BOOT 300 ulong start, end; 301 302 if (!bootz_setup((ulong)header, &start, &end)) { 303 spl_image->name = "Linux"; 304 spl_image->os = IH_OS_LINUX; 305 spl_image->load_addr = CONFIG_SYS_LOAD_ADDR; 306 spl_image->entry_point = CONFIG_SYS_LOAD_ADDR; 307 spl_image->size = end - start; 308 debug(SPL_TPL_PROMPT 309 "payload zImage, load addr: 0x%lx size: %d\n", 310 spl_image->load_addr, spl_image->size); 311 return 0; 312 } 313 #endif 314 315 #ifdef CONFIG_SPL_RAW_IMAGE_SUPPORT 316 /* Signature not found - assume u-boot.bin */ 317 debug("mkimage signature not found - ih_magic = %x\n", 318 header->ih_magic); 319 spl_set_header_raw_uboot(spl_image); 320 #else 321 /* RAW image not supported, proceed to other boot methods. */ 322 debug("Raw boot image support not enabled, proceeding to other boot methods\n"); 323 return -EINVAL; 324 #endif 325 } 326 327 return 0; 328 } 329 330 __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 331 { 332 typedef void __noreturn (*image_entry_noargs_t)(void); 333 334 image_entry_noargs_t image_entry = 335 (image_entry_noargs_t)spl_image->entry_point; 336 337 debug("image entry point: 0x%lx\n", spl_image->entry_point); 338 image_entry(); 339 } 340 341 #if CONFIG_IS_ENABLED(HANDOFF) 342 /** 343 * Set up the SPL hand-off information 344 * 345 * This is initially empty (zero) but can be written by 346 */ 347 static int setup_spl_handoff(void) 348 { 349 struct spl_handoff *ho; 350 351 ho = bloblist_ensure(BLOBLISTT_SPL_HANDOFF, sizeof(struct spl_handoff)); 352 if (!ho) 353 return -ENOENT; 354 355 return 0; 356 } 357 358 static int write_spl_handoff(void) 359 { 360 struct spl_handoff *ho; 361 362 ho = bloblist_find(BLOBLISTT_SPL_HANDOFF, sizeof(struct spl_handoff)); 363 if (!ho) 364 return -ENOENT; 365 handoff_save_dram(ho); 366 #ifdef CONFIG_SANDBOX 367 ho->arch.magic = TEST_HANDOFF_MAGIC; 368 #endif 369 debug(SPL_TPL_PROMPT "Wrote SPL handoff\n"); 370 371 return 0; 372 } 373 #else 374 static inline int setup_spl_handoff(void) { return 0; } 375 static inline int write_spl_handoff(void) { return 0; } 376 377 #endif /* HANDOFF */ 378 379 static int spl_common_init(bool setup_malloc) 380 { 381 int ret; 382 383 #if CONFIG_VAL(SYS_MALLOC_F_LEN) 384 if (setup_malloc) { 385 #ifdef CONFIG_MALLOC_F_ADDR 386 gd->malloc_base = CONFIG_MALLOC_F_ADDR; 387 #endif 388 gd->malloc_limit = CONFIG_VAL(SYS_MALLOC_F_LEN); 389 gd->malloc_ptr = 0; 390 } 391 #endif 392 ret = bootstage_init(true); 393 if (ret) { 394 debug("%s: Failed to set up bootstage: ret=%d\n", __func__, 395 ret); 396 return ret; 397 } 398 bootstage_mark_name(BOOTSTAGE_ID_START_SPL, "spl"); 399 #if CONFIG_IS_ENABLED(LOG) 400 ret = log_init(); 401 if (ret) { 402 debug("%s: Failed to set up logging\n", __func__); 403 return ret; 404 } 405 #endif 406 if (CONFIG_IS_ENABLED(BLOBLIST)) { 407 ret = bloblist_init(); 408 if (ret) { 409 debug("%s: Failed to set up bloblist: ret=%d\n", 410 __func__, ret); 411 return ret; 412 } 413 } 414 if (CONFIG_IS_ENABLED(HANDOFF)) { 415 int ret; 416 417 ret = setup_spl_handoff(); 418 if (ret) { 419 puts(SPL_TPL_PROMPT "Cannot set up SPL handoff\n"); 420 hang(); 421 } 422 } 423 if (CONFIG_IS_ENABLED(OF_CONTROL) && !CONFIG_IS_ENABLED(OF_PLATDATA)) { 424 ret = fdtdec_setup(); 425 if (ret) { 426 debug("fdtdec_setup() returned error %d\n", ret); 427 return ret; 428 } 429 } 430 if (CONFIG_IS_ENABLED(DM)) { 431 bootstage_start(BOOTSTATE_ID_ACCUM_DM_SPL, "dm_spl"); 432 /* With CONFIG_SPL_OF_PLATDATA, bring in all devices */ 433 ret = dm_init_and_scan(!CONFIG_IS_ENABLED(OF_PLATDATA)); 434 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_SPL); 435 if (ret) { 436 debug("dm_init_and_scan() returned error %d\n", ret); 437 return ret; 438 } 439 } 440 441 return 0; 442 } 443 444 #if !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD) 445 static void spl_setup_reloc(void) 446 { 447 gd->relocaddr = CONFIG_SPL_RELOC_TEXT_BASE; 448 gd->new_gd = (gd_t *)gd; 449 gd->start_addr_sp = gd->relocaddr; 450 gd->fdt_size = ALIGN(fdt_totalsize(gd->fdt_blob) + 0x1000, 32); 451 452 gd->start_addr_sp -= gd->fdt_size; 453 gd->new_fdt = (void *)gd->start_addr_sp; 454 memcpy(gd->new_fdt, gd->fdt_blob, gd->fdt_size); 455 gd->fdt_blob = gd->new_fdt; 456 457 gd->reloc_off = gd->relocaddr - CONFIG_SPL_TEXT_BASE; 458 } 459 #else 460 static void spl_setup_reloc(void) 461 { 462 // do nothing 463 } 464 #endif 465 466 void spl_set_bd(void) 467 { 468 /* 469 * NOTE: On some platforms (e.g. x86) bdata may be in flash and not 470 * writeable. 471 */ 472 if (!gd->bd) 473 gd->bd = &bdata; 474 } 475 476 int spl_early_init(void) 477 { 478 int ret; 479 480 debug("%s\n", __func__); 481 482 ret = spl_common_init(true); 483 if (ret) 484 return ret; 485 gd->flags |= GD_FLG_SPL_EARLY_INIT; 486 487 spl_setup_reloc(); 488 489 return 0; 490 } 491 492 int spl_init(void) 493 { 494 int ret; 495 bool setup_malloc = !(IS_ENABLED(CONFIG_SPL_STACK_R) && 496 IS_ENABLED(CONFIG_SPL_SYS_MALLOC_SIMPLE)); 497 498 debug("%s\n", __func__); 499 500 if (!(gd->flags & GD_FLG_SPL_EARLY_INIT)) { 501 ret = spl_common_init(setup_malloc); 502 if (ret) 503 return ret; 504 } 505 gd->flags |= GD_FLG_SPL_INIT; 506 507 return 0; 508 } 509 510 #ifndef BOOT_DEVICE_NONE 511 #define BOOT_DEVICE_NONE 0xdeadbeef 512 #endif 513 514 __weak void board_boot_order(u32 *spl_boot_list) 515 { 516 spl_boot_list[0] = spl_boot_device(); 517 } 518 519 static struct spl_image_loader *spl_ll_find_loader(uint boot_device) 520 { 521 struct spl_image_loader *drv = 522 ll_entry_start(struct spl_image_loader, spl_image_loader); 523 const int n_ents = 524 ll_entry_count(struct spl_image_loader, spl_image_loader); 525 struct spl_image_loader *entry; 526 527 for (entry = drv; entry != drv + n_ents; entry++) { 528 if (boot_device == entry->boot_device) 529 return entry; 530 } 531 532 /* Not found */ 533 return NULL; 534 } 535 536 static int spl_load_image(struct spl_image_info *spl_image, 537 struct spl_image_loader *loader) 538 { 539 int ret; 540 struct spl_boot_device bootdev; 541 542 bootdev.boot_device = loader->boot_device; 543 bootdev.boot_device_name = NULL; 544 545 ret = loader->load_image(spl_image, &bootdev); 546 #ifdef CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK 547 if (!ret && spl_image->dcrc_length) { 548 /* check data crc */ 549 ulong dcrc = crc32_wd(0, (unsigned char *)spl_image->dcrc_data, 550 spl_image->dcrc_length, CHUNKSZ_CRC32); 551 if (dcrc != spl_image->dcrc) { 552 puts("SPL: Image data CRC check failed!\n"); 553 ret = -EINVAL; 554 } 555 } 556 #endif 557 return ret; 558 } 559 560 /** 561 * boot_from_devices() - Try loading an booting U-Boot from a list of devices 562 * 563 * @spl_image: Place to put the image details if successful 564 * @spl_boot_list: List of boot devices to try 565 * @count: Number of elements in spl_boot_list 566 * @return 0 if OK, -ve on error 567 */ 568 static int boot_from_devices(struct spl_image_info *spl_image, 569 u32 spl_boot_list[], int count) 570 { 571 int i; 572 573 for (i = 0; i < count && spl_boot_list[i] != BOOT_DEVICE_NONE; i++) { 574 struct spl_image_loader *loader; 575 576 loader = spl_ll_find_loader(spl_boot_list[i]); 577 #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 578 if (loader) 579 printf("Trying to boot from %s\n", loader->name); 580 else 581 puts(SPL_TPL_PROMPT "Unsupported Boot Device!\n"); 582 #endif 583 if (loader && !spl_load_image(spl_image, loader)) { 584 spl_image->boot_device = spl_boot_list[i]; 585 return 0; 586 } 587 } 588 589 return -ENODEV; 590 } 591 592 #if defined(CONFIG_DM) && !defined(CONFIG_SPL_SKIP_RELOCATE) && !defined(CONFIG_TPL_BUILD) 593 static int spl_initr_dm(void) 594 { 595 int ret; 596 597 /* Save the pre-reloc driver model and start a new one */ 598 gd->dm_root_f = gd->dm_root; 599 gd->dm_root = NULL; 600 bootstage_start(BOOTSTATE_ID_ACCUM_DM_R, "spl_dm_r"); 601 ret = dm_init_and_scan(false); 602 bootstage_accum(BOOTSTATE_ID_ACCUM_DM_R); 603 if (ret) 604 return ret; 605 606 #if defined(CONFIG_TIMER) 607 gd->timer = NULL; 608 #endif 609 serial_init(); 610 611 return 0; 612 } 613 #else 614 static int spl_initr_dm(void) 615 { 616 return 0; 617 } 618 #endif 619 620 621 void board_init_r(gd_t *dummy1, ulong dummy2) 622 { 623 u32 spl_boot_list[] = { 624 BOOT_DEVICE_NONE, 625 BOOT_DEVICE_NONE, 626 BOOT_DEVICE_NONE, 627 BOOT_DEVICE_NONE, 628 BOOT_DEVICE_NONE, 629 }; 630 struct spl_image_info spl_image; 631 int ret; 632 633 debug(">>" SPL_TPL_PROMPT "board_init_r()\n"); 634 635 spl_initr_dm(); 636 637 spl_set_bd(); 638 639 #if defined(CONFIG_SYS_SPL_MALLOC_START) 640 mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, 641 CONFIG_SYS_SPL_MALLOC_SIZE); 642 gd->flags |= GD_FLG_FULL_MALLOC_INIT; 643 #endif 644 if (!(gd->flags & GD_FLG_SPL_INIT)) { 645 if (spl_init()) 646 hang(); 647 } 648 #if !defined(CONFIG_PPC) && !defined(CONFIG_ARCH_MX6) 649 /* 650 * timer_init() does not exist on PPC systems. The timer is initialized 651 * and enabled (decrementer) in interrupt_init() here. 652 */ 653 timer_init(); 654 #endif 655 656 if (CONFIG_IS_ENABLED(GPIO_HOG)) 657 gpio_hog_probe_all(); 658 659 #if CONFIG_IS_ENABLED(BOARD_INIT) 660 spl_board_init(); 661 #endif 662 663 if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF)) 664 dram_init_banksize(); 665 666 bootcount_inc(); 667 668 memset(&spl_image, '\0', sizeof(spl_image)); 669 #ifdef CONFIG_SYS_SPL_ARGS_ADDR 670 spl_image.arg = (void *)CONFIG_SYS_SPL_ARGS_ADDR; 671 #endif 672 spl_image.boot_device = BOOT_DEVICE_NONE; 673 board_boot_order(spl_boot_list); 674 675 if (boot_from_devices(&spl_image, spl_boot_list, 676 ARRAY_SIZE(spl_boot_list))) { 677 puts(SPL_TPL_PROMPT "failed to boot from all boot devices\n"); 678 hang(); 679 } 680 681 spl_perform_fixups(&spl_image); 682 if (CONFIG_IS_ENABLED(HANDOFF)) { 683 ret = write_spl_handoff(); 684 if (ret) 685 printf(SPL_TPL_PROMPT 686 "SPL hand-off write failed (err=%d)\n", ret); 687 } 688 if (CONFIG_IS_ENABLED(BLOBLIST)) { 689 ret = bloblist_finish(); 690 if (ret) 691 printf("Warning: Failed to finish bloblist (ret=%d)\n", 692 ret); 693 } 694 695 #ifdef CONFIG_CPU_V7M 696 spl_image.entry_point |= 0x1; 697 #endif 698 switch (spl_image.os) { 699 case IH_OS_U_BOOT: 700 debug("Jumping to U-Boot\n"); 701 break; 702 #if CONFIG_IS_ENABLED(ATF) 703 case IH_OS_ARM_TRUSTED_FIRMWARE: 704 debug("Jumping to U-Boot via ARM Trusted Firmware\n"); 705 spl_invoke_atf(&spl_image); 706 break; 707 #endif 708 #if CONFIG_IS_ENABLED(OPTEE) 709 case IH_OS_TEE: 710 debug("Jumping to U-Boot via OP-TEE\n"); 711 spl_optee_entry(NULL, NULL, spl_image.fdt_addr, 712 (void *)spl_image.entry_point); 713 break; 714 #endif 715 #ifdef CONFIG_SPL_OS_BOOT 716 case IH_OS_LINUX: 717 debug("Jumping to Linux\n"); 718 spl_fixup_fdt(); 719 spl_board_prepare_for_linux(); 720 jump_to_image_linux(&spl_image); 721 #endif 722 default: 723 debug("Unsupported OS image.. Jumping nevertheless..\n"); 724 } 725 #if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) 726 debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr, 727 gd->malloc_ptr / 1024); 728 #endif 729 #ifdef CONFIG_BOOTSTAGE_STASH 730 bootstage_mark_name(BOOTSTAGE_ID_END_SPL, "end_spl"); 731 ret = bootstage_stash((void *)CONFIG_BOOTSTAGE_STASH_ADDR, 732 CONFIG_BOOTSTAGE_STASH_SIZE); 733 if (ret) 734 debug("Failed to stash bootstage: err=%d\n", ret); 735 #endif 736 737 debug("loaded - jumping to U-Boot...\n"); 738 spl_board_prepare_for_boot(); 739 jump_to_image_no_args(&spl_image); 740 } 741 742 #ifdef CONFIG_SPL_SERIAL_SUPPORT 743 /* 744 * This requires UART clocks to be enabled. In order for this to work the 745 * caller must ensure that the gd pointer is valid. 746 */ 747 void preloader_console_init(void) 748 { 749 gd->baudrate = CONFIG_BAUDRATE; 750 751 serial_init(); /* serial communications setup */ 752 753 gd->have_console = 1; 754 755 #if CONFIG_IS_ENABLED(BANNER_PRINT) 756 puts("\nU-Boot " SPL_TPL_NAME " " PLAIN_VERSION " (" U_BOOT_DATE " - " 757 U_BOOT_TIME " " U_BOOT_TZ ")\n"); 758 #endif 759 #ifdef CONFIG_SPL_DISPLAY_PRINT 760 spl_display_print(); 761 #endif 762 } 763 #endif 764 765 /** 766 * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution 767 * 768 * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM 769 * for the main board_init_r() execution. This is typically because we need 770 * more stack space for things like the MMC sub-system. 771 * 772 * This function calculates the stack position, copies the global_data into 773 * place, sets the new gd (except for ARM, for which setting GD within a C 774 * function may not always work) and returns the new stack position. The 775 * caller is responsible for setting up the sp register and, in the case 776 * of ARM, setting up gd. 777 * 778 * All of this is done using the same layout and alignments as done in 779 * board_init_f_init_reserve() / board_init_f_alloc_reserve(). 780 * 781 * @return new stack location, or 0 to use the same stack 782 */ 783 ulong spl_relocate_stack_gd(void) 784 { 785 #ifdef CONFIG_SPL_STACK_R 786 gd_t *new_gd; 787 ulong ptr = CONFIG_SPL_STACK_R_ADDR; 788 789 #if defined(CONFIG_SPL_SYS_MALLOC_SIMPLE) && CONFIG_VAL(SYS_MALLOC_F_LEN) 790 if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) { 791 debug("SPL malloc() before relocation used 0x%lx bytes (%ld KB)\n", 792 gd->malloc_ptr, gd->malloc_ptr / 1024); 793 ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 794 gd->malloc_base = ptr; 795 gd->malloc_limit = CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 796 gd->malloc_ptr = 0; 797 } 798 #endif 799 /* Get stack position: use 8-byte alignment for ABI compliance */ 800 ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16); 801 new_gd = (gd_t *)ptr; 802 memcpy(new_gd, (void *)gd, sizeof(gd_t)); 803 #if CONFIG_IS_ENABLED(DM) 804 dm_fixup_for_gd_move(new_gd); 805 #endif 806 #if !defined(CONFIG_ARM) 807 gd = new_gd; 808 #endif 809 return ptr; 810 #else 811 return 0; 812 #endif 813 } 814